SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
AlphaServer GS1280 Model 64
SPECint_rate2000 = 632    
SPECint_rate_base2000 = 573    
SPEC license # 2 Tested by: HP Test date: Jun-2003 Hardware Avail: Oct-2003 Software Avail: Oct-2003
Graph Scale Benchmark Base
Copies Runtime Ratio
164.gzip base result bar (424)
164.gzip peak result bar (426)
164.gzip 64 245    424     64 244    426    
175.vpr base result bar (598)
175.vpr peak result bar (611)
175.vpr 64 174    598     64 170    611    
176.gcc base result bar (624)
176.gcc peak result bar (684)
176.gcc 64 131    624     64 119    684    
181.mcf base result bar (486)
181.mcf peak result bar (828)
181.mcf 64 275    486     64 161    828    
186.crafty base result bar (713)
186.crafty peak result bar (713)
186.crafty 64 104    713     64 104    713    
197.parser base result bar (375)
197.parser peak result bar (474)
197.parser 64 356    375     64 282    474    
252.eon base result bar (690)
252.eon peak result bar (682)
252.eon 64 140    690     64 142    682    
253.perlbmk base result bar (549)
253.perlbmk peak result bar (568)
253.perlbmk 64 244    549     64 235    568    
254.gap base result bar (463)
254.gap peak result bar (513)
254.gap 64 176    463     64 159    513    
255.vortex base result bar (784)
255.vortex peak result bar (875)
255.vortex 64 180    784     64 161    875    
256.bzip2 base result bar (606)
256.bzip2 peak result bar (633)
256.bzip2 64 184    606     64 176    633    
300.twolf base result bar (732)
300.twolf peak result bar (739)
300.twolf 64 304    732     64 301    739    
  SPECint_rate_base2000 573      
  SPECint_rate2000 632    

Hardware Vendor: Hewlett-Packard Company
Model Name: AlphaServer GS1280 Model 64
CPU: Alpha 21364
CPU MHz: 1150
FPU: Integrated
CPU(s) enabled: 64 cores, 64 chips, 1 core/chip
CPU(s) orderable: 2 to 64
Parallel: No
Primary Cache: 64KB(I)+64KB(D) on chip
Secondary Cache: 1.75MB on chip per CPU
L3 Cache: None
Other Cache: None
Memory: 256GB (64 * 10 * 512MB RIMMs, both controllers populated)
Disk Subsystem: MFS 16GB (Memory File System)
Other Hardware: None
Operating System: Tru64 UNIX V5.1B (Rev. 2650)
Compiler: Compaq C V6.5-011-48C5K
Program Analysis Tools V2.0
Spike V5.2 (509 DTK)
Compaq C++ V6.5-035
File System: MFS 16GB
System State: Multi-user
Notes / Tuning Information
 Baseline C  : cc  -arch ev7 -fast +CFB ONESTEP 
          C++: cxx -arch ev7 -O2        ONESTEP 
      164.gzip: cc -g3 -arch ev6 ONESTEP -fast -O4 -non_shared +CFB 
       175.vpr: cc -g3 -arch ev7 ONESTEP
                -fast -O4 -assume restricted_pointers +CFB 
       176.gcc: cc -g3 -arch ev7 ONESTEP
                -fast -O4 -xtaso_short -all -ldensemalloc -none
                +CFB +IFB 
       181.mcf: cc -g3 -arch ev7 ONESTEP -fast -xtaso_short +CFB +IFB +PFB
    186.crafty: same as base (cc...)
    197.parser: cc -g3 -arch ev7 ONESTEP
                -fast -O4 -xtaso_short -non_shared +CFB
       252.eon: cxx -arch ev7 ONESTEP -O2 -all -ldensemalloc -none 
   253.perlbmk: cc -g3 -arch ev7 ONESTEP -fast -non_shared +CFB +IFB 
       254.gap: cc -g3 -arch ev6 ONESTEP
                -fast -O4 -non_shared +CFB +IFB +PFB 
    255.vortex: cc -g3 -arch ev6 ONESTEP -fast -non_shared +CFB +IFB
     256.bzip2: cc -g3 -arch ev6 ONESTEP -fast -O4 -non_shared +CFB 
     300.twolf: cc -g3 -arch ev6 ONESTEP -fast -O4 
                -ldensemalloc -non_shared +CFB +IFB

 Most benchmarks are built using one or more types of 
 profile-driven feedback.  The types used are designated
 by abbreviations in the notes:

 +CFB: Code generation is optimized by the compiler, using 
       feedback from a training run.  These commands are
       done before the first compile (in phase "fdo_pre0"):

            mkdir /tmp/pp
            rm -f /tmp/pp/${baseexe}*

       and these flags are added to the first and second compiles:

            PASS1_CFLAGS = -prof_gen_noopt -prof_dir /tmp/pp
            PASS2_CFLAGS = -prof_use       -prof_dir /tmp/pp
      (Peak builds use /tmp/pp above; base builds use /tmp/pb.)

 +IFB: Icache usage is improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These commands
       are used (in phase "fdo_postN"):  

            mv ${baseexe} oldexe
            spike oldexe -feedback oldexe -o ${baseexe}

 +PFB: Prefetches are improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These
       commands are used (in phase "fdo_post_makeN"):

            rm -f *Counts*
            mv ${baseexe} oldexe
            pixie -stats dstride oldexe 1>pixie.out 2>pixie.err
            mv oldexe.pixie ${baseexe}

       A training run is carried out (in phase "fdo_runN"), and 
       then this command (in phase "fdo_postN"):

            spike oldexe -fb oldexe -stride_prefetch -o ${baseexe}

 When Spike is used for both Icache and Prefetch improvements, 
 only one spike command is actually issued, with the Icache 
 options followed by the Prefetch options.

         vm_bigpg_enabled = 1
         vm_bigpg_thresh = 6
         vm_swap_eager = 0
         ubc_maxpercent = 50
         max_per_proc_address_space = 34359738368
         max_per_proc_data_size = 34359738368
         max_per_proc_stack_size = 34359738368
         max_proc_per_user = 2048
         max_threads_per_user = 4096
         maxusers = 2048
         per_proc_address_space = 34359738368
         per_proc_data_size = 34359738368
         per_proc_stack_size = 34359738368
 Portability: gcc: -Dalloca=__builtin_alloca; crafty: -DALPHA
 perlbmk: -DSPEC_CPU2000_DUNIX; vortex: -DSPEC_CPU2000_LP64
 Information on UNIX V5.1B Patches can be found at
 Processes were bound to CPUs using "runon".

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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 26-Aug-2003

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