SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
AlphaServer GS1280 7/1300
SPECint_rate2000 = 183    
SPECint_rate_base2000 = 166    
SPEC license # 2 Tested by: HP Test date: Jun-2004 Hardware Avail: Aug-2004 Software Avail: Jul-2004
Graph Scale Benchmark Base
Copies Runtime Ratio
164.gzip base result bar (122)
164.gzip peak result bar (123)
164.gzip 16 213    122     16 211    123    
175.vpr base result bar (172)
175.vpr peak result bar (176)
175.vpr 16 151    172     16 148    176    
176.gcc base result bar (182)
176.gcc peak result bar (201)
176.gcc 16 112    182     16 102    201    
181.mcf base result bar (150)
181.mcf peak result bar (235)
181.mcf 16 223    150     16 142    235    
186.crafty base result bar (206)
186.crafty peak result bar (206)
186.crafty 16 90.1  206     16 90.1  206    
197.parser base result bar (108)
197.parser peak result bar (136)
197.parser 16 311    108     16 245    136    
252.eon base result bar (200)
252.eon peak result bar (198)
252.eon 16 121    200     16 122    198    
253.perlbmk base result bar (161)
253.perlbmk peak result bar (168)
253.perlbmk 16 208    161     16 199    168    
254.gap base result bar (133)
254.gap peak result bar (147)
254.gap 16 154    133     16 139    147    
255.vortex base result bar (225)
255.vortex peak result bar (253)
255.vortex 16 156    225     16 139    253    
256.bzip2 base result bar (174)
256.bzip2 peak result bar (182)
256.bzip2 16 160    174     16 153    182    
300.twolf base result bar (213)
300.twolf peak result bar (216)
300.twolf 16 261    213     16 257    216    
  SPECint_rate_base2000 166      
  SPECint_rate2000 183    

Hardware Vendor: Hewlett-Packard Company
Model Name: AlphaServer GS1280 7/1300
CPU: Alpha 21364
CPU MHz: 1300
FPU: Integrated
CPU(s) enabled: 16 cores, 16 chips, 1 core/chip
CPU(s) orderable: 2 to 64
Parallel: No
Primary Cache: 64KB(I)+64KB(D) on chip
Secondary Cache: 1.75MB on chip per CPU
L3 Cache: None
Other Cache: None
Memory: 2GB per CPU; 256MB RIMMs
Disk Subsystem: AdvFS
Other Hardware: None
Operating System: Tru64 UNIX V5.1B-1 + PK4
Compiler: Compaq C V6.5-011-48C5K
Program Analysis Tools V2.0
Spike V5.2 (510 USG)
Compaq C++ V6.5-041
File System: MFS, 16GB
System State: Multi-user
Notes / Tuning Information
 Baseline C  : cc  -arch ev7 -fast +CFB ONESTEP 
          C++: cxx -arch ev7 -O2        ONESTEP 
   All but 252.eon: cc -g3 -arch ev7 ONESTEP
      164.gzip: -fast -O4 -non_shared +CFB 
       175.vpr: -fast -O4 -assume restricted_pointers +CFB 
       176.gcc: -fast -O4 -xtaso_short -all -ldensemalloc -none
                +CFB +IFB 
       181.mcf: -fast -xtaso_short +CFB +IFB +PFB
    186.crafty: same as base
    197.parser: -fast -O4 -xtaso_short -non_shared +CFB
       252.eon: cxx -arch ev7 -O2 -all -ldensemalloc -none 
   253.perlbmk: -fast -non_shared +CFB +IFB 
       254.gap: -fast -O4 -non_shared +CFB +IFB +PFB 
    255.vortex: -fast -non_shared +CFB +IFB
     256.bzip2: -fast -O4 -non_shared +CFB 
     300.twolf: -fast -O4 
                -ldensemalloc -non_shared +CFB +IFB

 Most benchmarks are built using one or more types of 
 profile-driven feedback.  The types used are designated
 by abbreviations in the notes:

 +CFB: Code generation is optimized by the compiler, using 
       feedback from a training run.  These commands are
       done before the first compile (in phase "fdo_pre0"):

            mkdir /tmp/pp
            rm -f /tmp/pp/${baseexe}*

       and these flags are added to the first and second compiles:

            PASS1_CFLAGS = -prof_gen_noopt -prof_dir /tmp/pp
            PASS2_CFLAGS = -prof_use_feedback -prof_dir /tmp/pp
      (Peak builds use /tmp/pp above; base builds use /tmp/pb.)

 +IFB: Icache usage is improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These commands
       are used (in phase "fdo_postN"):  

            mv ${baseexe} oldexe
            spike oldexe -feedback oldexe -o ${baseexe}

 +PFB: Prefetches are improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These
       commands are used (in phase "fdo_post_makeN"):

            rm -f *Counts*
            mv ${baseexe} oldexe
            pixie -stats dstride oldexe 1>pixie.out 2>pixie.err
            mv oldexe.pixie ${baseexe}

       A training run is carried out (in phase "fdo_runN"), and 
       then this command (in phase "fdo_postN"):

            spike oldexe -fb oldexe -stride_prefetch -o ${baseexe}

 When Spike is used for both Icache and Prefetch improvements, 
 only one spike command is actually issued, with the Icache 
 options followed by the Prefetch options.

         vm_bigpg_enabled = 1
         vm_bigpg_thresh = 6
         vm_swap_eager = 0
         ubc_maxpercent = 50
         max_per_proc_address_space = 34359738368
         max_per_proc_data_size = 34359738368
         max_per_proc_stack_size = 34359738368
         max_proc_per_user = 2048
         max_threads_per_user = 4096
         maxusers = 2048
         per_proc_address_space = 34359738368
         per_proc_data_size = 34359738368
         per_proc_stack_size = 34359738368
 Portability: gcc: -Dalloca=__builtin_alloca; crafty: -DALPHA
 perlbmk: -DSPEC_CPU2000_DUNIX; vortex: -DSPEC_CPU2000_LP64
 Information on UNIX V5.1B Patches can be found at
 Processes were bound to CPUs using "runon".

For questions about this result, please contact the tester.
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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 10-Aug-2004

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