SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer p5 520 (1650 MHz, 2 CPU)
SPECint_rate2000 = 32.9  
SPECint_rate_base2000 = 30.3  
SPEC license # 11 Tested by: IBM Test date: Jun-2004 Hardware Avail: Aug-2004 Software Avail: Aug-2004
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (23.8)
164.gzip peak result bar (23.9)		 164.gzip 4 273    23.8   4 272    23.9  
175.vpr base result bar (26.7)
175.vpr peak result bar (26.7)		 175.vpr 4 243    26.7   4 243    26.7  
176.gcc base result bar (35.7)
176.gcc peak result bar (35.7)		 176.gcc 4 143    35.7   4 143    35.7  
181.mcf base result bar (40.5)
181.mcf peak result bar (41.4)		 181.mcf 4 206    40.5   4 202    41.4  
186.crafty base result bar (24.2)
186.crafty peak result bar (33.2)		 186.crafty 4 191    24.2   4 140    33.2  
197.parser base result bar (18.8)
197.parser peak result bar (29.2)		 197.parser 4 445    18.8   4 286    29.2  
252.eon base result bar (38.4)
252.eon peak result bar (38.4)		 252.eon 4 157    38.4   4 157    38.4  
253.perlbmk base result bar (24.5)
253.perlbmk peak result bar (26.9)		 253.perlbmk 4 341    24.5   4 311    26.9  
254.gap base result bar (27.6)
254.gap peak result bar (29.4)		 254.gap 4 185    27.6   4 173    29.4  
255.vortex base result bar (50.5)
255.vortex peak result bar (53.3)		 255.vortex 4 175    50.5   4 165    53.3  
256.bzip2 base result bar (34.7)
256.bzip2 peak result bar (35.2)		 256.bzip2 4 201    34.7   4 197    35.2  
300.twolf base result bar (31.6)
300.twolf peak result bar (31.0)		 300.twolf 4 441    31.6   4 448    31.0  
  SPECint_rate_base2000 30.3    
  SPECint_rate2000 32.9  

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer p5 520 (1650 MHz, 2 CPU)
CPU: POWER5
CPU MHz: 1650
FPU: Integrated
CPU(s) enabled: 2 cores, 1 chip, 2 cores/chip (SMT on)
CPU(s) orderable: 2
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off chip)/DCM, 1 DCM/SUT
Other Cache: none
Memory: 8x4 GB
Disk Subsystem: 1x36GB SCSI, 15K RPM
Other Hardware:
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 7.0 for AIX
File System: AIX/JFS2
System State: Multi-User
Notes / Tuning Information 
 Portability Flags:
   176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
   186.crafty:   -DAIX
   252.eon:      srcalt=fmax_errno 
                 -I. -DNDEBUG
   253.perlbmk:  -DSPEC_CPU2000_AIX
   254.gap:      -DSYS_IS_BSD -DSYS_STRING_H -DSYS_HAS_TIME_PROTO
                 -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
   300.twolf:    -DHAVE_SIGNED_CHAR
 
 
 Base Optimization Flags:
   C:    -qpdf1/pdf2 
         -O5 -blpdata -qalign=natural
   C++:  -qpdf1/pdf2 
         -O5 -lhmu -qalign=natural
 
 
 Peak Optimization Flags
   164.gzip:     -qpdf1/pdf2
                 -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -D_ILS_MACROS
                 "CC=xlc"
   175.vpr:      basepeak = 1 
   176.gcc:      basepeak = 1
   181.mcf:      fdpr -quiet -R3
                 -O5 -blpdata -qfdpr
   186.crafty:   -qpdf1/pdf2
                 fdpr -quiet -R3
                 -O4 -q64 -qfdpr -qarch=pwr3 -qtune=pwr3 -D_ILS_MACROS
   197.parser:   -qpdf1/pdf2
                 fdpr -quiet -R3
                 -O4 -blpdata -D_ILS_MACROS -qfdpr -qarch=pwr3 -qtune=pwr3
   252.eon:      basepeak = 1
   253.perlbmk:  -qpdf1/pdf2
                 -O5 -D_ILS_MACROS -lhmu -qalign=natural
   254.gap:      -qpdf1/pdf2
                 -O4 -qarch=pwr4 -qtune=pwr4 -D_ILS_MACROS -lhmu -qalign=natural
   255.vortex:   -qpdf1/pdf2
                 -O5 -lhmu -qalign=natural -D_ILS_MACROS -blpdata
   256.bzip2:    -qpdf1/pdf2
                 -O5 -blpdata -qarch=pwr3 -qtune=pwr3 -qalign=natural
   300.twolf:    -O5 -lhmu -blpdata -qalign=natural
                 "CC = xlc"

 Approved alternate-source file 252.eon.fmax_errno.src.alt.tar.gz
 was used with 252.eon for POSIX-compatibility.

 SMT: Acronym for "Simultaneous Multi-Threading". A processor technology that allows
      the simultaneous execution of multiple thread contexts within a single processor
      core. (Enabled by default)
 DCM: Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
 SUT: Acronym for "System Under Test"

 ulimits set to unlimited.
 Large page mode and memory affinity were set as follows:
    vmo -r -o lgpg_regions=400 -o lgpg_size=16777216 -o memory_affinity=1
    chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
    reboot -q
    export MEMORY_AFFINITY=MCM

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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 24-Aug-2004

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