SPEC CINT2000 Summary IBM Corporation IBM eServer p5 590 (1650 MHz, 32 CPU) Tue Sep 21 17:11:20 2004 SPEC License #11 Test date: Sep-2004 Hardware availability: Nov-2004 Tester: IBM Software availability: Nov-2004 Base Base Base Peak Peak Peak Benchmarks # Copies Run Time Rate # Copies Run Time Rate ------------ -------- -------- -------- -------- -------- -------- 164.gzip 64 277 376* 64 270 385* 164.gzip 64 277 375 64 270 385 164.gzip 64 277 376 64 271 384 175.vpr 64 244 425 64 250 416 175.vpr 64 246 422* 64 246 423* 175.vpr 64 247 422 64 244 426 176.gcc 64 150 545 64 142 573 176.gcc 64 149 547* 64 142 575* 176.gcc 64 149 548 64 142 576 181.mcf 64 213 627 64 204 656 181.mcf 64 211 633* 64 208 643* 181.mcf 64 210 636 64 208 642 186.crafty 64 176 421* 64 141 525 186.crafty 64 175 423 64 141 527 186.crafty 64 179 414 64 141 526* 197.parser 64 275 486 64 273 490 197.parser 64 276 485* 64 274 487 197.parser 64 277 483 64 274 488* 252.eon 64 159 606 64 145 665 252.eon 64 159 605* 64 145 667* 252.eon 64 161 601 64 145 667 253.perlbmk 64 348 384* 64 313 427 253.perlbmk 64 348 384 64 314 425* 253.perlbmk 64 347 385 64 314 425 254.gap 64 161 508 64 160 509 254.gap 64 161 507 64 160 511 254.gap 64 161 508* 64 160 510* 255.vortex 64 193 732 64 181 779 255.vortex 64 192 734* 64 180 783* 255.vortex 64 192 735 64 180 784 256.bzip2 64 204 546 64 200 556 256.bzip2 64 203 547* 64 199 559 256.bzip2 64 203 548 64 200 557* 300.twolf 64 450 495 64 454 490* 300.twolf 64 452 492* 64 453 492 300.twolf 64 453 491 64 455 489 ======================================================================== 164.gzip 64 277 376* 64 270 385* 175.vpr 64 246 422* 64 246 423* 176.gcc 64 149 547* 64 142 575* 181.mcf 64 211 633* 64 208 643* 186.crafty 64 176 421* 64 141 526* 197.parser 64 276 485* 64 274 488* 252.eon 64 159 605* 64 145 667* 253.perlbmk 64 348 384* 64 314 425* 254.gap 64 161 508* 64 160 510* 255.vortex 64 192 734* 64 180 783* 256.bzip2 64 203 547* 64 200 557* 300.twolf 64 452 492* 64 454 490* SPECint_rate_base2000 503 SPECint_rate2000 529 HARDWARE -------- Hardware Vendor: IBM Corporation Model Name: IBM eServer p5 590 (1650 MHz, 32 CPU) CPU: POWER5 CPU MHz: 1650 FPU: Integrated CPU(s) enabled: 32 cores, 16 chips, 2 cores/chip (SMT on) CPU(s) orderable: 8,16,24,32 Parallel: No Primary Cache: 64KBI+32KBD (on chip)/core Secondary Cache: 1920KB unified (on chip)/chip L3 Cache: 36MB unified (off-chip)/chip, 4 chips/MCM, 4 MCMs/SUT Other Cache: None Memory: 128 GB DDR1 Disk Subsystem: 2x36GB SCSI, 15K RPM Other Hardware: None SOFTWARE -------- Operating System: AIX 5L V5.3 Compiler: XL C/C++ Enterprise Edition V7.0 for AIX File System: AIX/JFS2 System State: Multi-user NOTES ----- Tested by IBM Portability Flags: 176.gcc: EXTRA_CFLAGS=-ma -DHOST_WORDS_BIG_ENDIAN 186.crafty: EXTRA_CFLAGS=-DAIX 252.eon: EXTRA_LDFLAGS=-I. -DNDEBUG 253.perlbmk: EXTRA_CFLAGS=-DSPEC_CPU2000_AIX 254.gap: EXTRA_CFLAGS=-DSYS_IS_BSD -DSYS_STRING_H -DSYS_HAS_TIME_PROTO -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO 300.twolf: EXTRA_CFLAGS=-DHAVE_SIGNED_CHAR Base Optimization Flags: C: -qpdf1/pdf2 -O5 -blpdata -D_ILS_MACROS C++: -qpdf1/pdf2 -O5 -lhmu -qalign=natural Alternate Sources for Base & Peak: Approved alternate-source file 252.eon.fmax_errno.src.alt.tar.gz was used with 252.eon for POSIX-compatibility. Peak Optimization Flags: 164.gzip: -qpdf1/pdf2 -O5 -blpdata -D_ILS_MACROS -qfdpr fdpr -R3 175.vpr: -qpdf1/pdf2 -O5 -blpdata -qalign=natural -qhot=arraypad -Q 176.gcc: -qpdf1/pdf2 -O5 181.mcf: -O5 -blpdata -qfdpr -D_ILS_MACROS fdpr -R3 186.crafty: -qpdf1/pdf2 -O4 -q64 -qfdpr -qarch=pwr3 -qtune=pwr3 -D_ILS_MACROS fdpr -R3 197.parser: -qpdf1/pdf2 -O5 -blpdata -D_ILS_MACROS -qfdpr fdpr -R3 252.eon: -qpdf1/pdf2 -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -D_ILS_MACROS 253.perlbmk: -qpdf1/pdf2 -O5 -lhmu -qalign=natural 254.gap: -qpdf1/pdf2 -O5 -lhmu -qalign=natural -D_ILS_MACROS -blpdata 255.vortex: -qpdf1/pdf2 -O5 -lhmu -qalign=natural -D_ILS_MACROS -blpdata 256.bzip2: -qpdf1/pdf2 -O5 -blpdata -D_ILS_MACROS -qfdpr fdpr -R3 300.twolf: -qpdf1/pdf2 -O5 -blpdata -D_ILS_MACROS SMT: Acronym for "Simultaneous Multi-Threading". A processor technology that allows the simultaneous execution of multiple thread contexts within a single processor core. (Enabled by default) MCM: Acronym for "Multi-Chip Module" (four dual-core processor chips + four L3-cache chips) This system contains 4 MCMs. SUT: Acronym for "System Under Test" C: IBM XL C for AIX invoked as xlc C++: IBM XL C++ for AIX invoked as xlC APAR IY60349 was applied to AIX to enable new hardware support. ulimits set to unlimited. Large page mode and memory affinity were set as follows: vmo -r -o lgpg_regions=4096 -o lgpg_size=16777216 -o memory_affinity=1 chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER shutdown -r export MEMORY_AFFINITY=MCM The following config-file entry was used to assign each benchmark process to a core: submit = let "MYCPU=\$SPECUSERNUM"; bindprocessor \$\$ \$MYCPU; $command The following config-file entry was used to assign each benchmark process to a core: submit = schedule.64 \$SPECUSERNUM $command with the "schedule.64" function defined as follows: #!/bin/ksh index=$1 shift 1 # Strip off the residual arguments; the rest is the command. if [[ $index -ge 32 ]] then target=$((1+2*(index-32))) else target=$((2*index)) fi bindprocessor $$ $target # Schedule this job to the corresponding core. $* # Now run the command. The "bindprocessor" AIX command binds a process to a CPU core. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 1999-2004 Standard Performance Evaluation Corporation Generated on Tue Nov 2 17:03:11 2004 by SPEC CPU2000 ASCII formatter v2.1