SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer p5 575 (1500 MHz, 16 CPU)
SPECint_rate2000 = 238    
SPECint_rate_base2000 = 230    
SPEC license # 11 Tested by: IBM Test date: Jul-2005 Hardware Avail: Oct-2005 Software Avail: Oct-2005
Graph Scale Benchmark Base
Copies Runtime Ratio
164.gzip base result bar (176)
164.gzip peak result bar (177)
164.gzip 32 295    176     32 294    177    
175.vpr base result bar (195)
175.vpr peak result bar (193)
175.vpr 32 267    195     32 269    193    
176.gcc base result bar (263)
176.gcc peak result bar (259)
176.gcc 32 155    263     32 157    259    
181.mcf base result bar (295)
181.mcf peak result bar (307)
181.mcf 32 227    295     32 218    307    
186.crafty base result bar (184)
186.crafty peak result bar (242)
186.crafty 32 201    184     32 154    242    
197.parser base result bar (222)
197.parser peak result bar (222)
197.parser 32 301    222     32 301    222    
252.eon base result bar (282)
252.eon peak result bar (301)
252.eon 32 171    282     32 161    301    
253.perlbmk base result bar (180)
253.perlbmk peak result bar (187)
253.perlbmk 32 371    180     32 358    187    
254.gap base result bar (218)
254.gap peak result bar (211)
254.gap 32 187    218     32 194    211    
255.vortex base result bar (327)
255.vortex peak result bar (356)
255.vortex 32 216    327     32 198    356    
256.bzip2 base result bar (251)
256.bzip2 peak result bar (254)
256.bzip2 32 222    251     32 220    254    
300.twolf base result bar (218)
300.twolf peak result bar (215)
300.twolf 32 510    218     32 517    215    
  SPECint_rate_base2000 230      
  SPECint_rate2000 238    

Hardware Vendor: IBM Corporation
Model Name: IBM eServer p5 575 (1500 MHz, 16 CPU)
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 16 cores, 8 chips, 2 cores/chip (SMT on)
CPU(s) orderable: 16
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 8 DCM/SUT
Other Cache: None
Memory: 64x2GB
Disk Subsystem: 1x73GB SCSI, 15K RPM
Other Hardware: None
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 7.0 for AIX
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information
  Portability Flags:
    176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
    186.crafty:   -DAIX
    252.eon:      srcalt=fmax_errno
    253.perlbmk:  -DSPEC_CPU2000_AIX
    300.twolf:    -DHAVE_SIGNED_CHAR
  Base Optimization Flags:
    C:    -qpdf1/pdf2
          -O5 -blpdata -D_ILS_MACROS
    C++:  -qpdf1/pdf2
          -O5 -qalign=natural -D_ILS_MACROS
  Peak Optimization Flags
    164.gzip:     -qpdf1/pdf2
                  -O5 -blpdata -qfdpr -D_ILS_MACROS
                  fdpr -q -O3
    175.vpr:      -qpdf1/pdf2
                  -O5 -blpdata -qalign=natural -qhot=arraypad -Q -D_ILS_MACROS
    176.gcc:      -qpdf1/pdf2
                  -O5 -blpdata -qalign=natural -qhot=arraypad -Q -D_ILS_MACROS
    181.mcf:      -O5 -blpdata -qfdpr -D_ILS_MACROS
                  fdpr -q -O3
    186.crafty:   -qpdf1/pdf2
                  -O4 -q64 -qfdpr -qarch=pwr3 -qtune=pwr3
                  fdpr -q -O3
    197.parser:   -qpdf1/pdf2
                  -O5 -blpdata -qalign=natural -D_ILS_MACROS
    252.eon:      -qpdf1/pdf2
                  -O4 -qarch=auto -qtune=auto -qalign=natural -lhmu -D_ILS_MACROS
    253.perlbmk:  -qpdf1/pdf2
                  -O5 -lhmu -blpdata
    254.gap:      -qpdf1/pdf2
                  -O5 -lhmu -blpdata -D_ILS_MACROS
    255.vortex:   -qpdf1/pdf2
                  -O5 -lhmu -blpdata
    256.bzip2:    -O5 -blpdata -qfdpr -D_ILS_MACROS
                  fdpr -q -O3
    300.twolf:    -O5 -blpdata -qfdpr -D_ILS_MACROS
                  fdpr -q -O3
  The installed OS level is AIX 5L for POWER version 5.3 with the 5300-03 Recommended Maintenance package.
  Approved alternate-source file 252.eon.fmax_errno.src.alt.tar.gz was used with
  252.eon for POSIX-compatibility.
  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"
  C:              IBM XL C for AIX invoked as cc
  C++:            IBM XL C for AIX invoked as xlC
  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
      vmo -r -o lgpg_regions=4096 -o lgpg_size=16777216
      chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
      reboot -q
  The following config-file entry was used to assign each benchmark process to a core:
       submit = let "MYCPU=2*\$SPECUSERNUM"; if (("\$MYCPU > 31")) then let "MYCPU-=31"; fi; bindprocessor \$\$ \$MYCPU; $command
  The "bindprocessor" AIX command binds a process to a CPU core.

  Use flags-description file IBM-20050822-AIX.txt.

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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 24-Aug-2005

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