SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer Bladecenter HS20 (3.0 GHz Xeon, 2MB L2 Cache)
SPECint2000 = 1481     
SPECint_base2000 = 1472     
SPEC license # 11 Tested by: IBM Corporation Test date: Dec-2005 Hardware Avail: Feb-2006 Software Avail: Dec-2005
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 142    988     140    998     164.gzip base result bar (988)
164.gzip peak result bar (998)
175.vpr 1400 140    998     136    1027      175.vpr base result bar (998)
175.vpr peak result bar (1027)
176.gcc 1100 61.8  1781      61.8  1781      176.gcc base result bar (1781)
176.gcc peak result bar (1781)
181.mcf 1800 104    1734      104    1733      181.mcf base result bar (1734)
181.mcf peak result bar (1733)
186.crafty 1000 89.4  1118      89.0  1124      186.crafty base result bar (1118)
186.crafty peak result bar (1124)
197.parser 1800 145    1241      145    1246      197.parser base result bar (1241)
197.parser peak result bar (1246)
252.eon 1300 69.0  1885      68.7  1892      252.eon base result bar (1885)
252.eon peak result bar (1892)
253.perlbmk 1800 99.2  1814      99.6  1807      253.perlbmk base result bar (1814)
253.perlbmk peak result bar (1807)
254.gap 1100 68.2  1614      66.4  1657      254.gap base result bar (1614)
254.gap peak result bar (1657)
255.vortex 1900 73.3  2592      73.3  2594      255.vortex base result bar (2592)
255.vortex peak result bar (2594)
256.bzip2 1500 135    1114      134    1120      256.bzip2 base result bar (1114)
256.bzip2 peak result bar (1120)
300.twolf 3000 195    1538      196    1529      300.twolf base result bar (1538)
300.twolf peak result bar (1529)
SPECint_base2000 1472       
  SPECint2000 1481       

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer Bladecenter HS20 (3.0 GHz Xeon, 2MB L2 Cache)
CPU: Intel Xeon 3.0 (800 MHz system bus)
CPU MHz: 3000
FPU: Integrated
CPU(s) enabled: 2 cores, 2 chips, 1 core/chip (Hyper-Threading Technology disabled)
CPU(s) orderable: 1,2
Parallel: No
Primary Cache: 12K(I) micro-ops + 16KB(D) on chip
Secondary Cache: 2048(I+D) on chip
L3 Cache: N/A
Other Cache: N/A
Memory: 4 x 1024 MB ECC PC2-3200 Single Rank
Disk Subsystem: 73GB SCSI 10K RPM
Other Hardware:
Software
Operating System: Windows Server 2003 Standard Edition
Compiler: Intel C/C++ Compiler 9.0 (20051130Z) for 32-bit applications
Intel Fortran Compiler 9.0 (20051120Z) for 32-bit applications
Microsoft Visual Studio .NET 13.0.9466 (for libraries)
MicroQuill Smartheap Library 7.30
File System: NTFS
System State: Default
Notes / Tuning Information 
 GENERAL
   ONESTEP=yes
   +FDO:   PASS1=-Qprof_gen  PASS2=-Qprof_use
 PORTABILITY FLAGS
   176.gcc:     -Dalloca=_alloca /F10000000
   186.crafty:  -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap:     -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 BASE TUNING
   C:           -fast -Qansi_alias +FDO shlW32M.lib
   C++:         -fast -Qcxx_features +FDO shlW32M.lib
 PEAK TUNING
   164.gzip:    -fast +FDO
   175.vpr:     -fast +FDO
   176.gcc:     basepeak=yes
   181.mcf:     -fast +FDO shlW32M.lib
   186.crafty:  -fast -Oa +FDO shlW32M.lib
   197.parser:  -fast +FDO 
   252.eon:     -fast +FDO shlW32M.lib
   253.perlbmk: -fast -Oa +FDO shlW32M.lib
   254.gap:     -fast +FDO
   255.vortex   -fast +FDO shlw32M.lib
   256.bzip2:   -fast -Qunroll1 -Oa +FDO shlw32M.lib
   300.twolf:   -fast +FDO shlW32M.lib
 EXTRA LIBRARIES
   shlW32M.lib: MicroQuill SmartHeap Library 7.3
                www.microquill.com

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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 22-Feb-2006

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