SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM System p5 520 (1650 MHz, 1 CPU)
SPECint2000 = 1337     
SPECint_base2000 = 1288     
SPEC license # 11 Tested by: IBM Test date: Dec-2005 Hardware Avail: Feb-2006 Software Avail: Feb-2006
Benchmark Reference
Runtime Ratio Graph Scale
164.gzip 1400 186    751     181    775     164.gzip base result bar (751)
164.gzip peak result bar (775)
175.vpr 1400 125    1123      122    1146      175.vpr base result bar (1123)
175.vpr peak result bar (1146)
176.gcc 1100 80.9  1360      80.2  1372      176.gcc base result bar (1360)
176.gcc peak result bar (1372)
181.mcf 1800 64.1  2809      76.7  2346      181.mcf base result bar (2809)
181.mcf peak result bar (2346)
186.crafty 1000 97.0  1030      79.6  1257      186.crafty base result bar (1030)
186.crafty peak result bar (1257)
197.parser 1800 156    1153      154    1172      197.parser base result bar (1153)
197.parser peak result bar (1172)
252.eon 1300 91.5  1421      91.5  1420      252.eon base result bar (1421)
252.eon peak result bar (1420)
253.perlbmk 1800 208    865     185    972     253.perlbmk base result bar (865)
253.perlbmk peak result bar (972)
254.gap 1100 94.6  1163      92.9  1183      254.gap base result bar (1163)
254.gap peak result bar (1183)
255.vortex 1900 88.9  2137      78.5  2422      255.vortex base result bar (2137)
255.vortex peak result bar (2422)
256.bzip2 1500 121    1243      115    1301      256.bzip2 base result bar (1243)
256.bzip2 peak result bar (1301)
300.twolf 3000 208    1439      199    1507      300.twolf base result bar (1439)
300.twolf peak result bar (1507)
SPECint_base2000 1288       
  SPECint2000 1337       

Hardware Vendor: IBM Corporation
Model Name: IBM System p5 520 (1650 MHz, 1 CPU)
CPU MHz: 1650
FPU: Integrated
CPU(s) enabled: 1 core, 1 chip, 2 cores/chip (SMT off)
CPU(s) orderable: 1,2
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified, shared (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 1 DCM/SUT
Other Cache: None
Memory: 8x2GB
Disk Subsystem: 2x73GB SCSI, 15K RPM
Other Hardware: None
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 8.0 for AIX
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information
  Portability Flags:
    176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
    186.crafty:   -DAIX
    253.perlbmk:  -DSPEC_CPU2000_AIX
    254.gap:      -DSYS_IS_BSD -DSYS_STRING_H
    300.twolf:    -DHAVE_SIGNED_CHAR
  Base Optimization Flags:
    C:    -qpdf1/pdf2
          -O5 -blpdata -D_ILS_MACROS
    C++:  -qpdf1/pdf2
          -O4 -qalign=natural
  Peak Optimization Flags
    164.gzip:     -qpdf1/pdf2
                  -O4 -qfdpr -blpdata
                  fdpr -q -O3
    175.vpr:      -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    176.gcc:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    181.mcf:      -qpdf1/pdf2
                  -O4 -qalign=natural -blpdata
    186.crafty:   -qpdf1/pdf2
                  -O4 -qalign=natural -q64 -lhmu -blpdata
    197.parser:   -qpdf1/pdf2
                  -O4 -qfdpr -D_ILS_MACROS -blpdata
                  fdpr -q -O3
    252.eon:      -qpdf1/pdf2
                  -O4 -qalign=natural
    253.perlbmk:  -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata -lhmu
    254.gap:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    255.vortex:   -qpdf1/pdf2
                  -O4 -qfdpr -lhmu -blpdata
                  fdpr -q -O3
    256.bzip2:    -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    300.twolf:    -O5 -qfdpr -blpdata
                  fdpr -q -O3
  The installed OS level is AIX 5L for POWER version 5.3 with the 5300-04 Recommended Technology Level.
  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"
  Extended C:     IBM XL C for AIX invoked as cc
  C++:            IBM XL C for AIX invoked as xlC
  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
      vmo -r -o lgpg_regions=200 -o lgpg_size=16777216
      chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
      shutdown -rF
  The following config-file entry was used to assign each benchmark process to a core:
       submit = bindprocessor \$\$ \$SPECUSERNUM; $command
  The "bindprocessor" AIX command binds a process to a CPU core.
  One core was deconfigured and SMT disabled using the AIX commands
       smtctl -m off -w boot
       bosboot -aD
       shutdown -rF
       drmgr -r -c cpu

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 08-Mar-2006

Generated on Wed Mar 8 10:18:39 2006 by SPEC CPU2000 HTML formatter v1.01