AIX 5L with IBM XL Compilers SPEC CPU Flags
This where I want to put SMT, DCM, SUT, ulimits, Large Page, smtctl, drmgr, bindprocessor descriptions.
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Invoke the IBM XL C compliler. 32-bit binaries are producded by default.
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Invoke the IBM XL C++ compliler. 32-bit binaries are producded by default.
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Invoke the IBM XL Fortran compliler. 32-bit binaries are producded by default.
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Invoke the IBM Feedback Directed Program Restructuring FDO utility.
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Split -qsuppress=msg1:msg2
-O5
Perform optimizations for maximum performance. This includes maximum
interprocedural anaylisis on all of the objects presented on the "link"
step. This level of optimization will increase the compiler's memory
usage and compile time requirements.
-O5 is equivalent to the following flags
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-O4
Perform optimizations for maximum performance. This includes
interprocedural anaylisis on all of the objects presented on the "link"
step.
-O4 is equivalent to the following flags
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-O3
Perform some memory and compile time intensive optimizations in
addition to those executed with -O. The -O3 specific optimizations
have the potential to slightly alter the semantics of a user's program. ....
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-O
Performs the optimizations that the compiler developers considered the
best combination for compilation speed and runtime.
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-qhot
Performs high-order transformations on loops during optimization.
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-qarch=pwr5x, -qarch=auto
Produces object code containg instructins that will run on the
specified processors. "auto" selects the processor the complile
is being done on. "pwr5x" is the POWER5+ processor.
Supported values for this flag are
- auto
Slect
- pwr5x
- pwr5
- pwr4
- ppc970
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-qtune=pwr4, -qtune=auto
Specifies the architecture system for which the executable program
is optimized. This includes instruction scheduling and cache setting.
The supported values for suboption are:
- auto
Use the processor on which the program is compiled.
- pwr5x
The POWER5+ processor based systems.
- pwr5
The POWER5 processor based systems.
- pwr4
The POWER4 processor based systems.
- ppc970
The PPC970 processor based systems.
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-qipa=level=2
-fipa=noobject
level=1 turns on
level=2 turns on
noobject supression of actual code generation as each source file is processed
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-qalias=noansi -qalias=nostd
qalias=ansi | noansi
If ansi is specified, type-based aliasing is
used during optimization, which restricts the
lvalues that can be safely used to access a
data object. The default is ansi for the xlc,
xlC, and c89 commands. This option has no
effect unless you also specify the -O option.
qalias=std |nostd
Indicates whether the compilation units contain
any non-standard aliasing (see Compiler Reference
for more information). If so, specify nostd.
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-qalias_size=200000000
specifies the size of the internal alias table for the compiler to use for alias analysis
Causes the compiler to output a traceback if it abends.
Indicates that the input fortran source program is in fixed form.
Adds an underscore to global entites to match the C compiler ABI
Causes the compiler to treat "char" variables as signed instead of the
default of unsigned.
Indicates that the compiler understands how to do alloca().
Causes AIX to define "ischar()" (and friends) as macro's and no subroutines.
Causes C++ compiled routines to use pooled memory allocation.
The __IBM_FAST_VECTOR macro defines a different iterator for the std::vector
template class. This iterator results in faster code, but is not compatible
with code using the default iterator for a std::vector template class.
All uses of std::vector for a data type must use the same iterator.
Add -D__IBM_FAST_VECTOR to the compile line, or "#define __IBM_FAST_VECTOR 1"
to your source code to use the faster iterator for std::vector template class.
You must compile all sources with this macro.
Generates 64 bit ABI binaries.
The compiler generates additional symbol information for use by the AIX "fdprpro"
code optimizer.
Specifies what aggregate alignment rules the
compiler uses for file compilation, where the
alignment options are:
bit_packed
The compiler uses the bit_packed alignment
rules.
full
The compiler uses the RISC System/6000
alignment rules. This is the same as power.
mac68k
The compiler uses the Macintosh alignment
rules. This suboption is valid only for 32-
bit compilations.
natural
The compiler maps structure members to their
natural boundaries.
packed
The compiler uses the packed alignment rules.
power
The compiler uses the RISC System/6000
alignment rules.
twobyte
The compiler uses the Macintosh alignment
rules. This suboption is valid only for 32-
bit compilations. The mac68k option is the
same as twobyte.
The default is -qalign=full.
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Sets the bit in the file's XCOFF header indicating that this
executable will request the use of large pages when they are
available on the system and when the user has an appropriate
privilege
Indicates that a program, designed to execute in a
large page memory environment, can take advantage
of large 16 MB pages provided on POWER4 and higher
based systems.
Link the mathematical acceleration subsystem libraries (MASS),
which contain libraries of tuned mathematical intrinsic
functions.
Link the Engineering and Scientifc Subroutine Library (ESSL).
Specifies that, if either -lessl or -lesslsmp are also
specified, then Engineering and Scientific Subroutine Library
(ESSL) routines should be used in place of some Fortran 90
intrinsic procedures when there is a safe opportunity to do so.
The option used in the first pass of a profile directed feedback compile
that causes pdf information to be generated.
The option used in the second pass of a profile directed feedback compile
that causes pdf information to be utilized during optimization.
Allows most any c dialect.
Cause the C++ compiler to generate Run Time Type Identification code
Causes the Fortran compiler to allocate dynamic arrays on the heap instead of the stack
-qsuppress=1500-036
Suppresses the message with the message number specified
-bmaxdata:0x8000000
Causes the system loader to put the heap in it's own segment of the size specified.
This is only required for 32-bit applications, as their segments are 256M.