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<title>SPEC CPU2006 Software OS and BIOS tuning Descriptions HP ProLiant Intel-based systems
applications</title>
<header>
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 Copyright &copy; 2007 Intel Corporation.  All Rights Reserved.</p>
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  Explanations of platform info, such as BIOS settings
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<p><b>Platform settings</b></p>

<p>One or more of the following settings may have been set.  If so, the "Platform Notes" section of the
report will say so; and you can read below to find out more about what these settings mean.</p>

<p><b>Power Regulator for ProLiant support (Default=HP Dynamic Power Savings Mode)</b></p> 
<p>Values for this BIOS setting can be:</p>

<ul> 
       <li><b>HP Dynamic Power Savings Mode</b>: Automatically varies processor 
         speed and power usage based on processor utilization. Allows 
         reducing overall power consumption with little or no impact to
         performance. Does not require OS support. </li>

       <li><b>HP Static Low Power Mode</b>: Reduces processor speed and power usage.
         Guarantees a lower maximum power usage for the system. Performance
         impacts will be greater for environments with higher processor 
         utilization. </li>

       <li><b>HP Static High Performance Mode</b>: Processors will run in their 
         maximum power/performance state at all times regardless of the 
         OS power managment policy. </li>

       <li><b>OS Control Mode</b>: Processors will run in their maximum power/
         performance state at all times unless the OS enables' a power 
         management policy. </li>
</ul>

<p><b>HP Power Profile (Default = Balanced Power and Performance):</b></p>
<p> Values for this BIOS setting can be:</p>

<ul>
      <li><b>Balanced Power and Performance</b>: Provides the optimum settings to 
      maximize power savings with minimal impact to performance for most Operating 
      Systems and applications.</li>

      <li><b>Maximum Performance</b>: Disables all power management options that may 
      negatively affect performance.</li>

      <li><b>Minimum Power Usage</b>: Enables power reduction mechanisms that may 
      negatively affect performance. This mode will guarantee a lower maximum power 
      usage by the system. - Maximum Performance: Disables all power management 
      options that ma negatively affec performance.</li>

</ul>

<p><b>Power Efficiency Mode (Default=Efficiency)</b></p> 
<p>Values for this BIOS setting can be:</p>

<ul> 
       <li><b>Efficiency</b>: Maximize the power efficiency of the server. </li>

       <li><b>Performance</b>: Maximize the performance of the server. </li>

       <li><b>Custom</b>: Allows the user to customize power and performance related 
       options individually. </li>

</ul>


<p><b>Adjacent Sector Prefetch (Default = Enabled):</b></p> 
<p>
       This BIOS option allows the enabling/disabling of a processor mechanism to                 
       fetch the adjacent cache line within an 128-byte sector that contains 
       the data needed due to a cache line miss. </p>
<p>                
       In some limited cases, setting this option to Disabled may improve
       performance. In the majority of cases, the default value of Enabled                        
       provides better performance.  Users should only disable this option 
       after performing application benchmarking to verify improved
       performance in their environment.</p>

<p><b>Hardware Prefetch (Default = Enabled):</b></p> 
<p>
       This BIOS option allows allows the enabling/disabling of a processor 
       mechanism to prefetch data into the cache according to a pattern 
       recognition algorithm.</p>
<p>                
       In some limited cases, setting this option to Disabled may improve
       performance. In the majority of cases, the default value of Enabled                        
       provides better performance.  Users should only disable this option 
       after performing application benchmarking to verify improved
       performance in their environment.</p>

<p><b>Data Reuse (Default = Enabled):</b></p> 
<p>
       This BIOS option allows allows the enabling/disabling of the Data 
       Reuse optimization. </p>
<p>
       Enabling this option reduces the frequency of L3 cache updates from 
       the L1 cache. This may improve performance by reducing the internal 
       bandwidth consumed by constantly updating L1 cache lines in the L3 
       cache.</p>
<p>                
       Since this optimization results in more fetches to main memory, in 
       some limited cases, setting this option to Disabled may improve
       performance. In the majority of cases, the default value of Enabled                        
       provides better performance.  Users should only disable this option 
       after performing application benchmarking to verify improved
       performance in their environment.</p>

<p><b>Turbo Mode (Default = Enabled):</b></p>
<p>
       Turbo Boost Technology is a processor feature which allows the processor 
       to transition to a higher frequency than the processor's rate speed if 
       the processor has available power headroom and is within tempereature 
       specifications. Disabling this feature will reduce power usage but will 
       reduce the system's maximum achievable performance under some workloads.
</p>

<p><b>Thermal Configuration (Default = Optimal Cooling):</b></p>
<p>This feature allows the user to select the fan cooling solution for the system. 
Values for this BIOS option can be:</p>
<ul>

       <li><b>Optimal Cooling</b>: Provides the most efficient solution by 
       configuring fan speeds to the minimum required to provide adequate 
       cooling.</li>
    
       <li><b>Increased Cooling</b>: Will run fans at higher speeds to provide 
       aditional cooling. Increased Cooling should be selected when non-HP 
       storage controllers are cabled to the embedded hard drive cage, or if 
       the system is experiencing thermal issues that cannot be resolved in 
       another manner. This option may also improve performance when Turbo Boost
       Technology is used.</li>

</ul>

<p><b>Defer All Transactions Mode (Default = Disabled):</b></p> 
<p>
       When this option is enabled, front-side bus bandwidth may be increased 
       on systems with heavy I/O workload because CPU initiated I/O transactions 
       can be deferred enabling other transactions to make progress while data 
       is retrieved. However, latency for completing transactions may also 
       increase. The system's workload will determine which setting will provide 
       highest performance.</p>

<p><b>Memory Speed with 2DPC (Default=1066MHz@1.35V)</b></p> 
<p>    Sets the memory speed and voltage setting for system when there are 2 DIMMs 
       per channel (2DPC). Values for this BIOS setting can be:</p>

<ul> 
       <li><b>1333MHz@1.5V</b></li>

       <li><b>1066MHz@1.35V</b></li>
</ul>

<p><b>SATA #1 Controller (Default=Auto)</b></p> 
<p>    Sets the mode for the embedded controller. The values for this BIOS setting 
       can be:</p>

<ul> 
       <li><b>Disabled: </b>Disables SATA controller</li>

       <li><b>Compatible: </b>Sets controller to IDE Compatiblity mode</li>

       <li><b>RAID: </b>Sets controller to RAID mode</li>

       <li><b>AHCI: </b>Sets controller to Advanced Host Controller Interface mode</li>

</ul>

<p><b> submit= MYMASK=`printf '0x%x' \$((1&lt;&lt;\$SPECCOPYNUM))`; /usr/bin/taskset \$MYMASK $command </b></p>
<p>
       When running multiple copies of benchmarks, the SPEC config file feature 
       <b>submit</b> is sometimes used to cause individual jobs to be bound to 
       specific processors. This specific submit command is used for Linux. 
       The description of the elements of the command are:</p>
       <ul>
       <li> <b>/usr/bin/taskset [options] [mask] [pid | command [arg] ... ]</b>: <br />
           taskset is used to set or retreive the CPU affinity of a running 
           process given its PID or to launch a new COMMAND with a given CPU 
           affinity. The CPU affinity is represented as a bitmask, with the 
           lowest order bit corresponding to the first logical CPU and highest
           order bit corresponding to the last logical CPU. When the taskset 
           returns, it is guaranteed that the given program has been scheduled
           to a legal CPU. <br /><br />

           The default behaviour of taskset is to run a new command with a 
           given affinity mask: <br /><br />

                taskset [mask] [command] [arguments] </li>
       <li> <b>$MYMASK</b>: The bitmask (in hexadecimal) corresponding to a specific
           SPECCOPYNUM. For example, $MYMASK value for the first copy of a 
           rate run will be 0x00000001, for the second copy of the rate will 
           be 0x00000002 etc. Thus, the first copy of the rate run will have a
           CPU affinity of CPU0, the second copy will have the affinity CPU1 
           etc.</li>
       <li> <b>$command</b>: Program to be started, in this case, the benchmark instance 
               to be started. </li>
        </ul>

<p><b>Using numactl to bind processes and memory to cores</b></p>
         <p>For multi-copy runs or single copy runs on systems with multiple sockets, 
         it is advantageous to bind a process to a particular core.  Otherwise, the OS 
         may arbitrarily move your process from one core to another.  This can effect 
         performance.  To help, SPEC allows the use of a "submit" command where users 
         can specify a utility to use to bind processes.  We have found the utility 'numactl' 
         to be the best choice.</p>
         <p>numactl runs processes with a specific NUMA scheduling or memory placement 
         policy.  The policy is set for a command and inherited by all of its children.  
         The numactl flag "--physcpubind" specifies which core(s) to bind the process. 
         "-l" instructs numactl to keep a process memory on the local node while "-m" 
         specifies which node(s) to place a process memory.  For full details on using 
         numactl, please refer to your Linux documentation, 'man numactl'</p>


<p><b> mysubmit.pl</b></p>
<p>
       This perl script is used to ensure that for a system with N cores the first 
       N/2 benchmark copies are bound to a core that does not share its L2 cache 
       with any of the other copies. The script does this by retrieving and using 
       CPU data from /proc/cpuinfo. Note this script will only work for 6-core CPUs.</p>

       	<ul>
        <li><b>Source</b><br />
       	******************************************************************************************************<br />
       	#!/usr/bin/perl<br />
	<br />
	use strict;<br />
	use Cwd;<br />
	<br />
	# The order in which we want copies to be bound to cores<br />
	# Copies: 0, 1, 2, 3<br />
	# Cores:  0, 1, 3, 6<br />
	<br />
	my $rundir = getcwd;<br />
	<br />
	my $copynum = shift @ARGV;<br />
	<br />
	my $i;<br />
	my $j;<br />
	my $tag;<br />
	my $num;<br />
	my $core;<br />
	<br />
	my @proc;<br />
	my @cores;<br />
	<br />
	open(INPUT, "/proc/cpuinfo") or<br />
	   die "can't open /proc/cpuinfo\n";<br />
	<br />
	#open(OUTPUT, "STDOUT");<br />
	<br />
	# proc[i][0] = logical processor ID<br />
	# proc[i][1] = physical processor ID<br />
	# proc[i][2] = core ID<br />
	<br />
	$i = 0;<br />
	<br />
	while(&#60;INPUT&#62;)<br />
	{<br />
	  chop;<br />
	<br />
	  ($tag, $num) = split(/\s+:\s+/, $_);<br />
	<br />
	<br />
	  if ($tag eq "processor") {<br />
	      $proc[$i][0] = $num;<br />
	  }<br />
	<br />
	  if ($tag eq "physical id") {<br />
	      $proc[$i][1] = $num;<br />
	  }<br />
	<br />
	  if ($tag eq "core id") {<br />
	      $proc[$i][2] = $num;<br />
	      $i++;<br />
	  }<br />
	}<br />
	<br />
	$i = 0;<br />
	$j = 0;<br />
	<br />
	for $core (0, 4, 2, 1, 5, 3) {<br />
	  while ($i &lt; 24) {<br />
	     if ($proc[$i][2] == $core) {<br />
	        $cores[$j] = $proc[$i][0];<br />
	        $j++;<br />
	     }<br />
	     $i++;<br />
	  }<br />
	  $i=0;<br />
	}<br />
	<br />
	open  RUNCOMMAND, "> runcommand" or die "failed to create run file";<br />
	print RUNCOMMAND "cd $rundir\n";<br />
	print RUNCOMMAND "@ARGV\n";<br />
	close RUNCOMMAND;<br />
   	system 'taskset', '-c', $cores[$copynum], 'sh', "$rundir/runcommand";<br />
	</li></ul>



<p><b> ulimit -s [n | unlimited] (Linux) </b></p>
<p>
           Sets the stack size to <b>n</b> kbytes, or <b>unlimited</b> to allow the stack size 
           to grow without limit. </p>

<p><b> KMP_STACKSIZE=integer[B|K|M|G|T] (Linux) </b></p>
<p>
           Sets the number of bytes to allocate for each parallel thread to use as its 
           private stack. Use the optional suffix B, K, M, G, or T, to specify bytes, 
           kilobytes, megabytes, gigabytes, or terabytes. The default setting is 2M on 
           IA32 and 4M on IA64. </p>

<p><b> KMP_AFFINITY=physical,n (Linux) </b></p>
<p>
           Assigns threads to consecutive physical processors (for example, cores), 
           beginning at processor n. Specifies the static mapping of user threads to 
           physical cores, beginning at processor n. For example, if a system is configured 
           with 8 cores, and OMP_NUM_THREADS=8 and KMP_AFFINITY=physical,2 are set, then 
           thread 0 will mapped to core 2, thread 1 will be mapped to core 3, and so on in 
           a round-robin fashion.    </p>

<p><b> OMP_NUM_THREADS=n  </b></p>
<p>
           This Environment Variable sets the maximum number of threads to use for OpenMP* 
           parallel regions to <b>n</b> if no other value is specified in the application. This 
           environment variable applies to both -openmp and -parallel (Linux) 
           or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 
           cores:<br />
           export OMP_NUM_THREADS=8<br />
           Default is the number of cores visible to the OS. 

    </p>

<p><b> vm.max_map_count-n (Linux) </b></p>
<p>
           The maximum number of memory map areas a process may have. Memory map areas 
           are used as a side-effect of calling malloc, directly by mmap and mprotect, 
           and also when loading shared libraries. </p>

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