<?xml version="1.0"?>
<!DOCTYPE flagsdescription SYSTEM "http://www.spec.org/dtd/cpuflags2.dtd">

<flagsdescription>

<filename>Oracle-platform-x86_64.CPUv1.2-RevA</filename>

<title>SPEC CPU2006 Platform Settings for Intel-based systems</title>


<submit_command><![CDATA[
<dl>

         <dd><p><b>submit= MYMASK=`printf '0x%x' $((1&lt;&lt;$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command </b></p>
         <p>When running multiple copies of benchmarks, the SPEC config file feature
         <b>submit</b> is sometimes used to cause individual jobs to be bound to
         specific processors. This specific submit command is used for Linux.
         The description of the elements of the command are:</p>
         <ul>
         <li><b>/usr/bin/taskset [options] [mask] [pid | command [arg] ... ]</b>: <br/>
         taskset is used to set or retrieve the CPU affinity of a running
         process given its PID or to launch a new COMMAND with a given CPU
         affinity. The CPU affinity is represented as a bitmask, with the
         lowest order bit corresponding to the first logical CPU and highest
         order bit corresponding to the last logical CPU. When the taskset
         returns, it is guaranteed that the given program has been scheduled
         to a legal CPU.<br/>
         The default behavior of taskset is to run a new command with a
         given affinity mask: <br/>
         taskset [mask] [command] [arguments]</li>
         <li><b>$MYMASK</b>: The bitmask (in hexadecimal) corresponding to a specific
         SPECCOPYNUM. For example, $MYMASK value for the first copy of a
         rate run will be 0x00000001, for the second copy of the rate will
         be 0x00000002 etc. Thus, the first copy of the rate run will have a
         CPU affinity of CPU0, the second copy will have the affinity CPU1
         etc.</li>
         <li><b>$command</b>: Program to be started, in this case, the benchmark instance
         to be started.</li>
         </ul>


         <p><b>Using numactl to bind processes and memory to cores</b></p>
         <p>For multi-copy runs or single copy runs on systems with multiple sockets, it is advantageous to bind a process to a particular core.  Otherwise, the OS may arbitrarily move your process from one core to another.  This can affect performance.  To help, SPEC allows the use of a "submit" command where users can specify a utility to use to bind processes.  We have found the utility 'numactl' to be the best choice.</p>
         <p>numactl runs processes with a specific NUMA scheduling or memory placement policy.  The policy is set for a command and inherited by all of its children.  The numactl flag "--physcpubind" specifies which core(s) to bind the process. "-l" instructs numactl to keep a process memory on the local node while "-m" specifies which node(s) to place a process memory.  For full details on using numactl, please refer to your Linux documentation, 'man numactl'</p>

         <p><b>submit= $[top]/mysubmit.pl $SPECCOPYNUM "$command" </b></p>
         <p> On Xeon 74xx series processors, some benchmarks at peak will run n/2 copies on a system with n logical processors. 
         The mysubmit.pl script assigns each copy in such a way that no two copies will share an L2 cache, for optimal performance. 
         The script looks in /proc/cpuinfo to come up with the list of cores that will satisfy this requirement.  		 

         The source code is shown below.</p>

         <p><b>Source</b>

         ******************************************************************************************************</p>

<pre>

#!/usr/bin/perl
 
use strict;
use Cwd;
 
# The order in which we want copies to be bound to cores
# Copies: 0, 1, 2, 3
# Cores:  0, 1, 3, 6
 
my $rundir        = getcwd;
 
my $copynum = shift @ARGV;

my $i;
my $j;
my $tag;
my $num;
my $core;
my $numofcores; 

my @proc;
my @cores;

open(INPUT, "/proc/cpuinfo") or
   die "can't open /proc/cpuinfo\n"; 

#open(OUTPUT, "STDOUT");

# proc[i][0] = logical processor ID
# proc[i][1] = physical processor ID
# proc[i][2] = core ID

$i = 0;
$numofcores = 0;

while(&lt;INPUT&gt;)
{
  chop;
 
  ($tag, $num) = split(/\s+:\s+/, $_);


  if ($tag eq "processor") {
      $proc[$i][0] = $num;
  }

  if ($tag eq "physical id") {
      $proc[$i][1] = $num;
  }

  if ($tag eq "core id") {
      $proc[$i][2] = $num;
      $i++;
      $numofcores++;
  }
}

$i = 0;
$j = 0;

for $core (0, 4, 2, 1, 5, 3) {
  while ($i &lt; $numofcores) {
     if ($proc[$i][2] == $core) {
        $cores[$j] = $proc[$i][0];
        $j++;
     }
     $i++;
  }
  $i=0;
}

open  RUNCOMMAND, "> runcommand" or die "failed to create run file";
print RUNCOMMAND "cd $rundir\n";
print RUNCOMMAND "@ARGV\n";
close RUNCOMMAND;
system 'taskset', '-c', $cores[$copynum], 'sh', "$rundir/runcommand";

</pre>

</dd>
</dl>
]]>
</submit_command>

<sw_environment>
<![CDATA[
<dl>

 <dt><b>HUGETLB_MORECORE</b></dt> 
 <dd>Set this environment variable to "yes" to enable applications to use large pages.</dd>

 <dt><b>LD_PRELOAD=/usr/lib64/libhugetlbfs.so</b></dt> 
 <dd>Setting this environment variable is necessary to enable applications to use large pages.</dd>



 <dt><b>KMP_STACKSIZE</b></dt> 
 <dd>Specify stack size to be allocated for each thread.</dd>

 <dt>KMP_AFFINITY</dt>
 <dd>
  <ul>
   <li>KMP_AFFINITY  =  &lt; physical | logical &gt;, starting-core-id <br />
       specifies the static mapping of user threads to physical cores. 
       For example, if you have a system configured with 8 cores, 
       OMP_NUM_THREADS=8 and KMP_AFFINITY=physical,0 then thread 0 will 
       be mapped to core 0, thread 1 will be mapped to core 1, and 
       so on in a round-robin fashion.</li>

   <li>KMP_AFFINITY = granularity=fine,scatter <br />
       The value for the environment variable KMP_AFFINITY affects how 
       the threads from an auto-parallelized program are scheduled
       across processors. <br />

       Specifying granularity=fine selects the finest granularity level, 
       causes each OpenMP thread to be bound to a single thread context.  <br />

       This ensures that there is only one thread per core on cores 
       supporting HyperThreading Technology<br />

       Specifying scatter distributes the threads as evenly as possible 
       across the entire system. <br /> 

       Hence a combination of these two options, will spread the threads 
       evenly across sockets, with one thread per physical core.
       </li>
  </ul>
 </dd>

 <dt><b>OMP_NUM_THREADS</b></dt> 
 <dd>Sets the maximum number of threads to use for OpenMP* parallel regions if no
 other value is specified in the application. This environment variable
 applies to both -openmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
 Example syntax on a Linux system with 8 cores:
 export OMP_NUM_THREADS=8
</dd>

 <dt><b>ulimit -s &lt;n&gt;</b></dt> 
 <dd>Sets the stack size to <b>n</b> kbytes, or <b>unlimited</b> to allow the stack size
 to grow without limit.</dd>


</dl>
]]>
</sw_environment>


<os_tuning>
<![CDATA[
<dl>

 <dt><b>echo 1 > /proc/sys/vm/drop_caches</b></dt> 
 <dd>Writing to this will cause the kernel to free pagechace</dd>

<dt><b><kbd>autoup=&lt;n&gt;</kbd></b> (Unix /etc/system) </dt>
 <dd>When the file system flush daemon <tt>fsflush</tt> runs, it writes
to disk all modified file buffers that are more than <kbd>n</kbd> seconds
old.  </dd>

<dt><b><kbd>psrset -c &lt;n&gt;</kbd></b> (Unix, superuser commands) </dt> 
<dd>Creates a new processor set and displays the new processor set ID.
</dd>

<dt><b><kbd>psrset -e &lt;n&gt;</kbd></b> (Unix, superuser commands)</dt>
<dd>Executes a command (with optional arguments) in the specified
processor set.  The command process and any child processes are executed
only by processors in the processor set.</dd>

<dt><b><kbd>tune_t_fsflushr=&lt;n&gt;</kbd></b> (Unix /etc/system)</dt>
<dd>Controls the number of seconds between runs of the file system flush daemon, <tt>fsflush</tt>.</dd>


</dl>
]]>
</os_tuning>



<firmware>
<![CDATA[
<dl>
 <dt><b>Hardware Prefetch:</b></dt> 
 <dd>
  This BIOS option allows the enabling/disabling of a processor mechanism 
  to prefetch data into the cache according to a pattern-recognition algorithm
  In some cases, setting this option to Disabled may improve performance. 
  Users should only disable this option after performing application benchmarking 
  to verify improved performance in their environment.
 </dd>

 <dt><b>Adjacent Sector Prefetch:</b></dt> 
 <dd>
  This BIOS option allows the enabling/disabling of a processor mechanism 
  to fetch the adjacent cache line within a 128-byte sector that contains the 
  data needed due to a cache line miss.
  In some cases, setting this option to Disabled may improve performance. 
  Users should only disable this option after performing application benchmarking 
  to verify improved performance in their environment.
 </dd>

 <dt><b>Adjacent Cache Line Prefetch:</b></dt> 
 <dd>This BIOS option allows the enabling/disabling of a processor mechanism to
 fetch the adjacent cache line within a 128-byte sector that contains
 the data needed due to a cache line miss.
 In some cases, setting this option to Disabled may improve performance. Users 
 should only disable this option after performing application benchmarking to 
 verify improved performance in their environment.
 </dd>

 <dt><b>L1 Data Prefetch: Enabled:</b></dt> 
 <dd>This BIOS option allows the enabling/disabling L1 cache Data prefetch.
 </dd>

 <dt><b>C-State : Disabled</b></dt> 
 <dd>Enable/Disable CPUs to enter C-State (lower power CPU state) while the system 
 is idle. This helps to lower power consumption when enabled.
 </dd>

 <dt><b>Data Reuse Optimization : Disabled</b></dt> 
 <dd>Enabling this BIOS option reduces the frequency of L3 cache updates from L1.
 This may improve performance by reducing the internal bandwidth consumed by 
 constantly updating L1 cache lines in L3. Since this results in more fetches 
 to main memory, setting this option to Disabled may improve performance in some 
 cases. Users should only disable this option after performing application 
 benchmarking to verify improved performance in their environment.
 </dd>

 <dt><b>Intel HT Technology : Disabled</b></dt> 
 <dd>This BIOS setting disables/enables Intel Hyper-Threading (HT) Technology. 
 With Intel HT Technology, the operating system can execute two threads in parallel
 within each processor core. 
 </dd>


</dl>
]]>
</firmware>

</flagsdescription>

