SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

IBM Corporation

IBM BladeCenter HS21 XM (Intel Xeon E5405)

SPECint®2006 = 19.3

CPU2006 license: 11 Test date: Dec-2007
Test sponsor: IBM Corporation Hardware Availability: Jan-2008
Tested by: IBM Corporation Software Availability: Nov-2007
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5405
CPU Characteristics: 1333MHz system bus
CPU MHz: 1995
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip
CPU(s) orderable: 1,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 12 MB I+D on chip per chip, 6 MB shared / 2 cores
L3 Cache: None
Other Cache: None
Memory: 16 GB (8 x 2 GB DDR2-5300F ECC)
Disk Subsystem: 1 x 36 GB SAS, 10000 RPM
Other Hardware: None
Software
Operating System: SuSE Linux Enterprise Server 10 (x86_64), Kernel
2.6.16.21-0.8-smp
Compiler: Intel C++ Compiler 10.1 for Linux
Build 20070913 Package ID: l_cc_p_10.1.008
Auto Parallel: Yes
File System: ReiserFS
System State: Multi-user, run level 3
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: MicroQuill SmartHeap 8.1
Binutils 2.17.50.0.15

Results Table

Benchmark Base Peak
Seconds Ratio Seconds Ratio Seconds Ratio Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 740 13.2 740 13.2 742 13.2 589 16.6 591 16.5 596 16.4
401.bzip2 873 11.0 875 11.0 873 11.1 809 11.9 811 11.9 810 11.9
403.gcc 674 11.9 675 11.9 673 12.0 516 15.6 518 15.5 517 15.6
429.mcf 464 19.6 463 19.7 463 19.7 453 20.1 453 20.1 453 20.1
445.gobmk 787 13.3 787 13.3 787 13.3 704 14.9 704 14.9 704 14.9
456.hmmer 886 10.5 887 10.5 886 10.5 509 18.3 509 18.3 509 18.3
458.sjeng 975 12.4 980 12.3 976 12.4 874 13.9 878 13.8 876 13.8
462.libquantum 132 158   128 161   128 162   124 167   124 167   124 167  
464.h264ref 1067 20.7 1065 20.8 1060 20.9 992 22.3 994 22.3 992 22.3
471.omnetpp 477 13.1 478 13.1 480 13.0 428 14.6 428 14.6 428 14.6
473.astar 672 10.4 675 10.4 677 10.4 609 11.5 606 11.6 613 11.4
483.xalancbmk 375 18.4 375 18.4 375 18.4 375 18.4 375 18.4 375 18.4

General Notes

 All benchmarks compiled in 32-bit mode except 401.bzip2 and 456.hmmer,
 for peak, are compiled in 64-bit mode
 Hardware Sector Prefetch Enabled and Adjacent Sector Prefetch Enabled
 OMP_NUM_THREADS set to number of cores
 KMP_AFFINITY set to physical,0
 KMP_STACKSIZE set to null

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -fast   -vec-guard-write   -parallel   -par-runtime-control 

C++ benchmarks:

 -xT   -ipo   -O3   -no-prec-div   -Wl,-z,muldefs   -L/spec/users/rahul/cpu2006.1.0/lib -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc 
401.bzip2:  /opt/intel/cce/10.1.008/bin/icc   -L/opt/intel/cce/10.1.008/lib   -I/opt/intel/cce/10.1.008/include 
456.hmmer:  /opt/intel/cce/10.1.008/bin/icc   -L/opt/intel/cce/10.1.008/lib   -I/opt/intel/cce/10.1.008/include 

C++ benchmarks:

 icpc 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -ansi-alias   -prefetch 
401.bzip2:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -prefetch   -auto-ilp32 
403.gcc:  -fast   -inline-calloc   -opt-malloc-options=3 
429.mcf:  -fast   -prefetch 
445.gobmk:  -prof-gen(pass 1)   -prof-use(pass 2)   -xT   -O2   -ipo   -no-prec-div   -ansi-alias 
456.hmmer:  -fast   -unroll2   -ansi-alias   -opt-multi-version-aggressive   -auto-ilp32 
458.sjeng:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -unroll4 
462.libquantum:  -fast   -unroll4   -Ob0   -prefetch   -opt-streaming-stores always   -vec-guard-write   -opt-malloc-options=3   -parallel   -par-runtime-control 
464.h264ref:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -prof-gen(pass 1)   -prof-use(pass 2)   -xT   -O3   -ipo   -no-prec-div   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/spec/users/rahul/cpu2006.1.0/lib -lsmartheap 
473.astar:  -prof-gen(pass 1)   -prof-use(pass 2)   -xT   -O3   -ipo   -no-prec-div   -ansi-alias   -opt-ra-region-strategy=routine   -Wl,-z,muldefs   -L/spec/users/rahul/cpu2006.1.0/lib -lsmartheap 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic10-ia32-intel64-linux-flags.20090714.14.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic10-ia32-intel64-linux-flags.20090714.14.xml.