SPEC(R) CINT2006 Summary Cisco Systems Cisco B200-M1 (Intel Xeon L5520 2.26 GHz) Fri Mar 6 01:58:07 2009 CPU2006 License: 9019 Test date: May-2009 Test sponsor: Cisco Systems Hardware availability: May-2009 Tested by: Cisco Systems Software availability: May-2009 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 16 921 170 * 16 793 197 * 400.perlbench 16 929 168 S 16 798 196 S 400.perlbench 16 916 171 S 16 787 199 S 401.bzip2 16 1272 121 S 16 1204 128 S 401.bzip2 16 1264 122 S 16 1192 129 * 401.bzip2 16 1266 122 * 16 1190 130 S 403.gcc 16 803 160 S 16 815 158 S 403.gcc 16 812 159 * 16 811 159 * 403.gcc 16 817 158 S 16 805 160 S 429.mcf 16 648 225 S 8 324 225 S 429.mcf 16 648 225 * 8 324 225 * 429.mcf 16 648 225 S 8 323 226 S 445.gobmk 16 903 186 S 16 818 205 S 445.gobmk 16 904 186 * 16 823 204 S 445.gobmk 16 907 185 S 16 822 204 * 456.hmmer 16 1083 138 S 8 408 183 S 456.hmmer 16 1086 137 S 8 417 179 * 456.hmmer 16 1084 138 * 8 420 178 S 458.sjeng 16 1116 173 * 16 1010 192 S 458.sjeng 16 1116 173 S 16 1008 192 S 458.sjeng 16 1115 174 S 16 1009 192 * 462.libquantum 16 532 623 * 16 532 623 * 462.libquantum 16 533 622 S 16 532 623 S 462.libquantum 16 532 624 S 16 531 624 S 464.h264ref 16 1460 243 S 16 1400 253 S 464.h264ref 16 1560 227 * 16 1445 245 S 464.h264ref 16 1563 227 S 16 1424 249 * 471.omnetpp 16 685 146 S 16 685 146 S 471.omnetpp 16 687 146 S 16 687 146 S 471.omnetpp 16 686 146 * 16 686 146 * 473.astar 16 924 122 * 16 827 136 S 473.astar 16 920 122 S 16 827 136 S 473.astar 16 926 121 S 16 827 136 * 483.xalancbmk 16 519 213 S 16 519 213 S 483.xalancbmk 16 520 212 S 16 520 212 S 483.xalancbmk 16 520 212 * 16 520 212 * ============================================================================== 400.perlbench 16 921 170 * 16 793 197 * 401.bzip2 16 1266 122 * 16 1192 129 * 403.gcc 16 812 159 * 16 811 159 * 429.mcf 16 648 225 * 8 324 225 * 445.gobmk 16 904 186 * 16 822 204 * 456.hmmer 16 1084 138 * 8 417 179 * 458.sjeng 16 1116 173 * 16 1009 192 * 462.libquantum 16 532 623 * 16 532 623 * 464.h264ref 16 1560 227 * 16 1424 249 * 471.omnetpp 16 686 146 * 16 686 146 * 473.astar 16 924 122 * 16 827 136 * 483.xalancbmk 16 520 212 * 16 520 212 * SPECint(R)_rate_base2006 186 SPECint_rate2006 200 HARDWARE -------- CPU Name: Intel Xeon L5520 CPU Characteristics: Intel Turbo Boost Technology up to 2.53 GHz CPU MHz: 2267 FPU: Integrated CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 8 MB I+D on chip per chip Other Cache: None Memory: 24 GB (12 x 2GB DDR3 1066 MHz) Disk Subsystem: 73 GB SAS ST973451SS, 15000 RPM Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 11 (x86_64), Kernel 2.6.27.19-5-default Compiler: Intel C++ Compiler 11.0 for Linux Build 20090131 Package ID: l_cproc_p_11.0.080 Auto Parallel: No File System: ext3 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V8.1 Submit Notes ------------ The config file option 'submit' was used. numactl --localalloc --physcpubind=$BIND was used to bind copies to the cores using following bind list: bind = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 Operating System Notes ---------------------- ulimit -s unlimited was used to set the stack size General Notes ------------- Submitted_by: "Ven Immani (immaniv)" Submitted: Wed Jun 10 17:31:06 EDT 2009 Submission: cpu2006-20090601-07564.sub Submitted_by: "Ven Immani (immaniv)" Submitted: Wed Jun 10 17:38:43 EDT 2009 Submission: cpu2006-20090601-07564.sub Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -static -inline-calloc -opt-malloc-options=3 -opt-prefetch C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -Wl,-z,muldefs -L/spec/cpu2006.1.1/lib -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc 401.bzip2: /opt/intel/Compiler/11.0/080/bin/intel64/icc 456.hmmer: /opt/intel/Compiler/11.0/080/bin/intel64/icc 458.sjeng: /opt/intel/Compiler/11.0/080/bin/intel64/icc C++ benchmarks (except as noted below): icpc 473.astar: /opt/intel/Compiler/11.0/080/bin/intel64/icpc Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias -opt-prefetch 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div -static -inline-calloc -opt-malloc-options=3 429.mcf: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: -xSSE4.2 -ipo -O3 -no-prec-div -static -opt-malloc-options=3 -opt-prefetch 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: basepeak = yes 473.astar: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -auto-ilp32 -Wl,-z,muldefs -L/spec/cpu2006.1.1/lib -lsmartheap64 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090710.15.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090710.15.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.1. Report generated on Wed Jul 23 01:18:42 2014 by CPU2006 ASCII formatter v6932. Originally published on 23 June 2009.