SPEC(R) CINT2006 Summary Dell Inc. PowerEdge M910 (Intel Xeon X6550, 2.00 GHz) Fri Jun 4 16:20:38 2010 CPU2006 License: 55 Test date: Jun-2010 Test sponsor: Dell Inc. Hardware availability: Mar-2010 Tested by: Dell Inc. Software availability: Dec-2009 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 32 1146 273 S 32 974 321 S 400.perlbench 32 1148 272 * 32 984 318 * 400.perlbench 32 1159 270 S 32 984 318 S 401.bzip2 32 1546 200 * 32 1479 209 * 401.bzip2 32 1544 200 S 32 1479 209 S 401.bzip2 32 1551 199 S 32 1495 207 S 403.gcc 32 1002 257 * 32 1002 257 * 403.gcc 32 1013 254 S 32 1013 254 S 403.gcc 32 1000 258 S 32 1000 258 S 429.mcf 32 768 380 S 32 768 380 S 429.mcf 32 766 381 S 32 766 381 S 429.mcf 32 768 380 * 32 768 380 * 445.gobmk 32 1038 323 S 32 964 348 * 445.gobmk 32 1038 323 * 32 965 348 S 445.gobmk 32 1050 320 S 32 962 349 S 456.hmmer 32 667 448 S 32 548 545 S 456.hmmer 32 669 446 * 32 549 544 S 456.hmmer 32 678 440 S 32 549 544 * 458.sjeng 32 1306 297 S 32 1204 322 S 458.sjeng 32 1309 296 * 32 1204 322 * 458.sjeng 32 1318 294 S 32 1204 322 S 462.libquantum 32 776 855 S 32 775 856 S 462.libquantum 32 776 854 * 32 775 856 * 462.libquantum 32 777 853 S 32 776 855 S 464.h264ref 32 1745 406 S 32 1674 423 S 464.h264ref 32 1725 411 * 32 1699 417 S 464.h264ref 32 1703 416 S 32 1684 421 * 471.omnetpp 32 908 220 S 32 832 240 S 471.omnetpp 32 910 220 S 32 832 240 * 471.omnetpp 32 910 220 * 32 833 240 S 473.astar 32 1112 202 S 32 1013 222 S 473.astar 32 1121 200 S 32 1015 221 S 473.astar 32 1120 201 * 32 1014 222 * 483.xalancbmk 32 634 348 * 32 634 348 * 483.xalancbmk 32 634 348 S 32 634 348 S 483.xalancbmk 32 635 348 S 32 635 348 S ============================================================================== 400.perlbench 32 1148 272 * 32 984 318 * 401.bzip2 32 1546 200 * 32 1479 209 * 403.gcc 32 1002 257 * 32 1002 257 * 429.mcf 32 768 380 * 32 768 380 * 445.gobmk 32 1038 323 * 32 964 348 * 456.hmmer 32 669 446 * 32 549 544 * 458.sjeng 32 1309 296 * 32 1204 322 * 462.libquantum 32 776 854 * 32 775 856 * 464.h264ref 32 1725 411 * 32 1684 421 * 471.omnetpp 32 910 220 * 32 832 240 * 473.astar 32 1120 201 * 32 1014 222 * 483.xalancbmk 32 634 348 * 32 634 348 * SPECint(R)_rate_base2006 322 SPECint_rate2006 343 HARDWARE -------- CPU Name: Intel Xeon X6550 CPU Characteristics: Intel Turbo Boost Technology up to 2.40 GHz CPU MHz: 2000 FPU: Integrated CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 2,4 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 18 MB I+D on chip per chip Other Cache: None Memory: 128 GB (32 x 4 GB DDR3-1066 QR RDIMM, CL7, ECC) Disk Subsystem: 1 x 146 GB 15000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 11 (x86_64), Kernel 2.6.27.19-5-smp Compiler: Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064 Auto Parallel: No File System: ext3 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V8.1 Submit Notes ------------ The config file option 'submit' was used. numactl was used to bind copies to the cores Operating System Notes ---------------------- 'ulimit -s unlimited' was used to set the stacksize to unlimited prior to run Platform Notes -------------- vm.zone_reclaim_mode = 1 in /etc/sysctl.conf file BIOS Settings: Power Management = Maximum Performance (Default = Active Power Controller) General Notes ------------- Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502 Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 462.libquantum: icc -m64 C++ benchmarks (except as noted below): icpc -m32 473.astar: icpc -m64 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32 403.gcc: basepeak = yes 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: -xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap 473.astar: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revE.20100330.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revE.20100330.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.1. Report generated on Wed Jul 23 11:42:05 2014 by CPU2006 ASCII formatter v6932. Originally published on 17 August 2010.