SPEC® CFP2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C200 M2 (Intel Xeon E5620, 2.40 GHz)

CPU2006 license: 9019 Test date: Apr-2011
Test sponsor: Cisco Systems Hardware Availability: Mar-2011
Tested by: Cisco Systems Software Availability: Jan-2011
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5620
CPU Characteristics: Intel Turbo Boost Technology up to 2.67 GHz
CPU MHz: 2400
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core
CPU(s) orderable: 1 ,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 12 MB I+D on chip per chip
Other Cache: None
Memory: 48 GB (12 x 4 GB 2Rx4 PC3L-10600R-9, ECC)
Disk Subsystem: 73 GB SAS, 15K RPM
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 11 (x86_64) with SP1,
Kernel 2.6.32.12-0.7-default
Compiler: Intel C++ and Fortran Intel 64 Compiler XE for
applications running
on Intel 64
Version 12.0.1.116 Build 20101116
Auto Parallel: No
File System: ext3
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other Software: None

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
410.bwaves 16 1344 162 1346 162 1346 162 8 656 166 656 166 658 165
416.gamess 16 1833 171 1888 166 1807 173 8 930 168 944 166 936 167
433.milc 16 845 174 845 174 845 174 16 835 176 835 176 835 176
434.zeusmp 16 723 201 727 200 726 201 16 723 201 727 200 726 201
435.gromacs 16 713 160 714 160 711 161 16 721 159 718 159 712 160
436.cactusADM 16 969 197 962 199 967 198 16 969 197 962 199 967 198
437.leslie3d 16 1300 116 1278 118 1288 117 8 612 123 615 122 612 123
444.namd 16 862 149 860 149 865 148 16 854 150 850 151 849 151
447.dealII 16 678 270 675 271 677 271 16 720 254 723 253 720 254
450.soplex 16 1036 129 1035 129 1035 129 8 490 136 490 136 490 136
453.povray 16 369 231 367 232 370 230 16 312 273 314 271 313 272
454.calculix 16 665 199 663 199 664 199 16 665 199 663 199 664 199
459.GemsFDTD 16 1562 109 1546 110 1550 109 16 1562 109 1546 110 1550 109
465.tonto 16 798 197 810 194 786 200 16 798 197 784 201 797 198
470.lbm 16 1046 210 1048 210 1045 210 8 446 247 447 246 447 246
481.wrf 16 920 194 915 195 915 195 16 920 194 915 195 915 195
482.sphinx3 16 1707 183 1707 183 1711 182 16 1640 190 1642 190 1642 190

Submit Notes

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

Operating System Notes

ulimit -s unlimited was used to set the stacksize to unlimited prior to run
Large pages were not enabled for this run

Platform Notes

BIOS Configuration : Data Reuse Optimization = Disabled

General Notes

Binaries compiled on RHEL5.5 with
binutils-2.17.50.0.6-14.el5

Base Compiler Invocation

C benchmarks:

 icc -m64 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Base Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
450.soplex:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 
482.sphinx3:  -DSPEC_CPU_LP64 

Base Optimization Flags

C benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -ansi-alias 

C++ benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -ansi-alias 

Fortran benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -static 

Benchmarks using both Fortran and C:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -ansi-alias 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m64 
482.sphinx3:  icc -m32 

C++ benchmarks (except as noted below):

 icpc -m64 
450.soplex:  icpc -m32   -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT 
453.povray:  icpc -m64   -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT 

Fortran benchmarks (except as noted below):

 ifort -m64 
437.leslie3d:  ifort -m64   -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT 
465.tonto:  ifort -m64   -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT 

Benchmarks using both Fortran and C:

 icc -m64   ifort -m64 

Peak Portability Flags

410.bwaves:  -DSPEC_CPU_LP64 
416.gamess:  -DSPEC_CPU_LP64 
433.milc:  -DSPEC_CPU_LP64 
434.zeusmp:  -DSPEC_CPU_LP64 
435.gromacs:  -DSPEC_CPU_LP64   -nofor_main 
436.cactusADM:  -DSPEC_CPU_LP64   -nofor_main 
437.leslie3d:  -DSPEC_CPU_LP64 
444.namd:  -DSPEC_CPU_LP64 
447.dealII:  -DSPEC_CPU_LP64 
453.povray:  -DSPEC_CPU_LP64 
454.calculix:  -DSPEC_CPU_LP64   -nofor_main 
459.GemsFDTD:  -DSPEC_CPU_LP64 
465.tonto:  -DSPEC_CPU_LP64 
470.lbm:  -DSPEC_CPU_LP64 
481.wrf:  -DSPEC_CPU_LP64   -DSPEC_CPU_CASE_FLAG   -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

433.milc:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -static   -auto-ilp32 
470.lbm:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -opt-malloc-options=3   -ansi-alias   -opt-prefetch   -static   -auto-ilp32 
482.sphinx3:  -xSSE4.2   -ipo   -O3   -no-prec-div   -unroll2 

C++ benchmarks:

444.namd:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -fno-alias   -auto-ilp32 
447.dealII:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -static   -auto-ilp32 
450.soplex:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -opt-malloc-options=3 
453.povray:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -ansi-alias 

Fortran benchmarks:

410.bwaves:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -static 
416.gamess:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll2   -inline-level=0   -scalar-rep-   -static 
434.zeusmp:  basepeak = yes 
437.leslie3d:  -xSSE4.2   -ipo   -O3   -no-prec-div 
459.GemsFDTD:  basepeak = yes 
465.tonto:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -auto   -inline-calloc   -opt-malloc-options=3 

Benchmarks using both Fortran and C:

435.gromacs:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -opt-prefetch   -static   -auto-ilp32 
436.cactusADM:  basepeak = yes 
454.calculix:  basepeak = yes 
481.wrf:  basepeak = yes 

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.0-linux64-revA.20110303.02.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic12.0-linux64-revA.20110303.02.xml.

SPEC and SPECfp are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

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Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.1.
Report generated on Wed Jul 23 19:41:57 2014 by SPEC CPU2006 HTML formatter v6932.
Originally published on 17 May 2011.