CPU2006 Flag Description
Dell Inc. PowerEdge M820 (Intel Xeon E5-4603, 2.00 GHz)

Copyright © 2006 Intel Corporation. All Rights Reserved.


Base Compiler Invocation

C benchmarks

C++ benchmarks


Peak Compiler Invocation

C benchmarks (except as noted below)

400.perlbench

445.gobmk

464.h264ref

C++ benchmarks (except as noted below)

473.astar


Base Portability Flags

400.perlbench

401.bzip2

403.gcc

429.mcf

445.gobmk

456.hmmer

458.sjeng

462.libquantum

464.h264ref

471.omnetpp

473.astar

483.xalancbmk


Peak Portability Flags

400.perlbench

401.bzip2

403.gcc

429.mcf

456.hmmer

458.sjeng

462.libquantum

473.astar

483.xalancbmk


Base Optimization Flags

C benchmarks

C++ benchmarks


Peak Optimization Flags

C benchmarks

400.perlbench

401.bzip2

403.gcc

429.mcf

445.gobmk

456.hmmer

458.sjeng

462.libquantum

464.h264ref

C++ benchmarks

471.omnetpp

473.astar

483.xalancbmk


Base Other Flags

C benchmarks

403.gcc


Peak Other Flags

C benchmarks

403.gcc


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY = granularity=fine,scatter
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
Specifying granularity=fine selects the finest granularity level, causes each OpenMP thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.
OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -openmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Firmware / BIOS / Microcode Settings

Hardware Prefetcher:

This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Adjacent Cache Line Prefetch:

This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within a 128-byte sector that contains the data needed due to a cache line miss. In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

High Bandwidth:

Enabling this option allows the chipset to defer memory transactions and process them out of order for optimal performance.

Data Reuse:

Enabling this BIOS option reduces the frequency of L3 cache updates from L1. This may improve performance by reducing the internal bandwidth consumed by constantly updating L1 cache lines in L3. Since this results in more fetches to main memory, setting this option to Disabled may improve performance in some cases. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Logical Processor:

This BIOS setting enables/disables Intel's Hyper-Threading (HT) Technology. With HT Technology, the operating system can execute two threads in parallel within each processor core.

Node Interleaving:

This BIOS option allows the enabling/disabling of memory interleaving across CPU nodes. When disabled, each CPU chip can only access memory within its own node.

CPU Power Management:

This BIOS setting allows configuration of various demand-based switching schemes. Maximum Performance maintains full voltage to processor internal components, even during periods of inactivity, eliminating the performance penalty associated with the phase transitions between high and low load.

Memory Frequency:

This BIOS setting allows the memory to be clocked to the highest supported frequency.

Turbo Boost:

ntel Turbo Boost Technology is a processor feature which allows the processor to transition to a higher frequency than the processor's rate speed if the processor has available power headroom and is within temperature specifications. Disabling this feature will reduce power usage but will reduce the system's maximum achievable performance under some workloads.

C States:

Enabling the CPU States causes the CPU to enter a low-power mode when the CPU is idle.

System Profile:

This BIOS option sets the performance and power management aggressiveness for the system. It is a collection of selections including a custom selection designed to allow customers to choose the ideal operating profile for their server system environment. It includes settings like CPU Power Management, Memory Frequency, Turbo Boost, C1E and C States.


Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.html,
http://www.spec.org/cpu2006/flags/Dell-Platform-Settings-V1.2-revA.20120410.00.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.xml,
http://www.spec.org/cpu2006/flags/Dell-Platform-Settings-V1.2-revA.20120410.00.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Thu Jul 24 11:18:01 2014 by SPEC CPU2006 flags formatter v6906.