CPU2006 Flag Description
Hewlett-Packard Company ProLiant BL460c Gen8 (2.40 GHz, Intel Xeon E5-2609)

Copyright © 2006 Intel Corporation. All Rights Reserved. Last updated: April 10th 2012.


Base Compiler Invocation

C benchmarks

C++ benchmarks


Peak Compiler Invocation

C benchmarks (except as noted below)

400.perlbench

445.gobmk

464.h264ref

C++ benchmarks (except as noted below)

473.astar


Base Portability Flags

400.perlbench

401.bzip2

403.gcc

429.mcf

445.gobmk

456.hmmer

458.sjeng

462.libquantum

464.h264ref

471.omnetpp

473.astar

483.xalancbmk


Peak Portability Flags

400.perlbench

401.bzip2

403.gcc

429.mcf

456.hmmer

458.sjeng

462.libquantum

473.astar

483.xalancbmk


Base Optimization Flags

C benchmarks

C++ benchmarks


Peak Optimization Flags

C benchmarks

400.perlbench

401.bzip2

403.gcc

429.mcf

445.gobmk

456.hmmer

458.sjeng

462.libquantum

464.h264ref

C++ benchmarks

471.omnetpp

473.astar

483.xalancbmk


Base Other Flags

C benchmarks

403.gcc


Peak Other Flags

C benchmarks

403.gcc


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
The "<modifier>" argument can be used to set the granularity level of thread scheduling.
The "<type>" argument is used to indicate the thread affinity to use.
The permute and offset argument can be set to 0 or 1.

If you set the number of threads to be equal to the number of cores, specifying KMP_AFFINITY=granularity=fine,scatter will spread the threads evenly across sockets, with one thread per physical core.

OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -openmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Operating System Tuning Parameters

OS Tuning

submit= MYMASK=`printf '0x%x' \$((1<<\$SPECCOPYNUM))`; /usr/bin/taskset \$MYMASK $command

When running multiple copies of benchmarks, the SPEC config file feature submit is sometimes used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux. The description of the elements of the command are:

Using numactl to bind processes and memory to cores

For multi-copy runs or single copy runs on systems with multiple sockets, it is advantageous to bind a process to a particular core. Otherwise, the OS may arbitrarily move your process from one core to another. This can effect performance. To help, SPEC allows the use of a "submit" command where users can specify a utility to use to bind processes. We have found the utility 'numactl' to be the best choice.

numactl runs processes with a specific NUMA scheduling or memory placement policy. The policy is set for a command and inherited by all of its children. The numactl flag "--physcpubind" specifies which core(s) to bind the process. "-l" instructs numactl to keep a process memory on the local node while "-m" specifies which node(s) to place a process memory. For full details on using numactl, please refer to your Linux documentation, 'man numactl'

numactl --interleave=all "runspec command"

Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.

Transparent Huge Pages

On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead. Hugepages are used by default if /sys/kernel/mm/redhat_transparent_hugepage/enabled is set to always.

Drive Write Cache

The Drive Write Cache is an option that can be enabled or disabled in the HP Array Configuration Utility, CLI version. The default value for the Drive Write Cache is set to Disabled, and in order to change this the HP Arracy Configuration Utility, CLI version needs to be installed. When the Drive Write Cache option is enabled on a HP Smart Arrary Controller in a system, it can allow the HP Smart Array Controller to help make drive writes more efficient.

Accelerator Ratio

The Accelerator Ratio is an option that can be set to different percentages (in 25% increments) in the HP Array Configuration Utility, CLI version. The default value for the Accelerator Ratio is set to 0% Read and 100% Write. In order to change this the HP Arracy Configuration Utility, CLI version needs to be installed. Changing the Accelerator Ratio allows the array installed on the HP Smart Arrary Controller to adjust how it priotizes reads and writes.

mysubmit.pl

This perl script is used to ensure that for a system with N cores the first N/2 benchmark copies are bound to a core that does not share its L2 cache with any of the other copies. The script does this by retrieving and using CPU data from /proc/cpuinfo. Note this script will only work for 6-core CPUs.

ulimit -s [n | unlimited] (Linux)

Sets the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.

KMP_STACKSIZE=integer[B|K|M|G|T] (Linux)

Sets the number of bytes to allocate for each parallel thread to use as its private stack. Use the optional suffix B, K, M, G, or T, to specify bytes, kilobytes, megabytes, gigabytes, or terabytes. The default setting is 2M on IA32 and 4M on IA64.

KMP_AFFINITY=physical,n (Linux)

Assigns threads to consecutive physical processors (for example, cores), beginning at processor n. Specifies the static mapping of user threads to physical cores, beginning at processor n. For example, if a system is configured with 8 cores, and OMP_NUM_THREADS=8 and KMP_AFFINITY=physical,2 are set, then thread 0 will mapped to core 2, thread 1 will be mapped to core 3, and so on in a round-robin fashion.

OMP_NUM_THREADS=n

This Environment Variable sets the maximum number of threads to use for OpenMP* parallel regions to n if no other value is specified in the application. This environment variable applies to both -openmp and -parallel (Linux) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores:
export OMP_NUM_THREADS=8
Default is the number of cores visible to the OS.

vm.max_map_count-n (Linux)

The maximum number of memory map areas a process may have. Memory map areas are used as a side-effect of calling malloc, directly by mmap and mprotect, and also when loading shared libraries.


Firmware / BIOS / Microcode Settings

Firmware Settings

One or more of the following settings may have been set. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.

Intel Hyperthreading Options (Default = Enabled):

This feature allows enabling/disabling of logical processor cores on processors supporting Intel's Hyper-Threading Technology. This option may improve overall performance for applications that will benefit from higher processor core count.

Power Regulator for ProLiant support (Default=HP Dynamic Power Savings Mode)

Values for this BIOS setting can be:

HP Power Profile (Default = Balanced Power and Performance):

Values for this BIOS setting can be:

Power Efficiency Mode (Default=Efficiency)

Values for this BIOS setting can be:

Minimum Processor Idle Power Core State (Default (w/HP Power Profile=Maximum Performance)=No C-states):

This feature selects the processor's lowest idle core power state (C-state) which the operating system will utilize. The higher the C-State, the lower the power usage of that idle state (Core C6 is the lowest power idle core state supported by the processor). Values for this setting can be:

Minimum Processor Idle Power Package State (Default (w/HP Power Profile=Maximum Performance)=No Package state):

This feature selects the processor's lowest idle package power state (C-state) which is enabled. The proecessor will automatically transition into the package C-states based on the Core C-states which cores on the processor have transitioned to. The higher the package C-state, the lower the power usage of that idle package state (Package C6 (retention) is the lowed power idle package state supported by the processor). Values for this setting can be:

Energy/Performance Bias (Default = Balanced Performance):

This option configures several processor subsystems to optimize the processor's performance and power usage. Values for this BIOS setting can be:

Collaborative Power Control (Default = Enabled):

This BIOS option allows the enabling/disabling of the Processor Clocking Controll (PCC) Interface, for operating systems which support this feature. Enabling this option allows the Operating System to request processor frequency changes even when the server has the Power Regulator option configured for Dynamic Power Savings Mode.

For Operating Systems that do not support the PCC Interface or when the Power Regulator Mode is not configured for Dynamic Power Savings Mode, this option has no impact on system operation.

Dynamic Power Capping Functionality (Default = Enabled):

This BIOS option allows the user to disable the System ROM Power Calibration feature that is executed during the boot process. When disabled, the user can expect faster boot times but will not be able to enable a Dynamic Power Cap until this feature is re-enabled.

Memory Power Savings Mode (Default = Balanced):

This option configures several memory parameters to optmizie the memory subsystems performance and power usage. Values for this BIOS setting can be:

Adjacent Sector Prefetch (Default = Enabled):

This BIOS option allows the enabling/disabling of a processor mechanism to fetch the adjacent cache line within an 128-byte sector that contains the data needed due to a cache line miss.

In some limited cases, setting this option to Disabled may improve performance. In the majority of cases, the default value of Enabled provides better performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Hardware Prefetch (Default = Enabled):

This BIOS option allows allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern recognition algorithm.

In some limited cases, setting this option to Disabled may improve performance. In the majority of cases, the default value of Enabled provides better performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Data Reuse (Default = Enabled):

This BIOS option allows the enabling/disabling of the Data Reuse optimization.

Enabling this option reduces the frequency of L3 cache updates from the L1 cache. This may improve performance by reducing the internal bandwidth consumed by constantly updating L1 cache lines in the L3 cache.

Since this optimization results in more fetches to main memory, in some limited cases, setting this option to Disabled may improve performance. In the majority of cases, the default value of Enabled provides better performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Turbo Mode (Default = Enabled):

Turbo Boost Technology is a processor feature which allows the processor to transition to a higher frequency than the processor's rate speed if the processor has available power headroom and is within tempereature specifications. Disabling this feature will reduce power usage but will reduce the system's maximum achievable performance under some workloads.

Thermal Configuration (Default = Optimal Cooling):

This feature allows the user to select the fan cooling solution for the system. Values for this BIOS option can be:

Defer All Transactions Mode (Default = Disabled):

When this option is enabled, front-side bus bandwidth may be increased on systems with heavy I/O workload because CPU initiated I/O transactions can be deferred enabling other transactions to make progress while data is retrieved. However, latency for completing transactions may also increase. The system's workload will determine which setting will provide highest performance.

Memory Speed with 2DPC (Default=1066MHz@1.35V)

Sets the memory speed and voltage setting for system when there are 2 DIMMs per channel (2DPC). Values for this BIOS setting can be:

SATA #1 Controller (Default=Auto)

Sets the mode for the embedded controller. The values for this BIOS setting can be:

Processor Power and Utilization Monitoring (Default = Enabled):

This BIOS option allows allows the enabling/disabling of iLo4 Processor State Mode Switching and Insight Power Management Processor Utilization Monitoring.

When set to disabled, the system will also set the HP Power Regulator mode to HP Static High Performance mode and the HP Power Profile mode to Custom. This option may be useful in some environments that require absolute minimum latency.


Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.html,
http://www.spec.org/cpu2006/flags/HP-Platform-Flags-Intel-V1.2-A.20120829.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.xml,
http://www.spec.org/cpu2006/flags/HP-Platform-Flags-Intel-V1.2-A.20120829.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Thu Jul 24 09:19:41 2014 by SPEC CPU2006 flags formatter v6906.