SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B200 M3 (Intel Xeon E5-2650L 1.80 GHz) Sat Nov 10 22:27:56 2012 CPU2006 License: 9019 Test date: Nov-2012 Test sponsor: Cisco Systems Hardware availability: Jun-2012 Tested by: Cisco Systems Software availability: Feb-2012 Base Base Base Peak Peak Peak Benchmarks Ref. Run Time Ratio Ref. Run Time Ratio -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 9770 477 20.5 S 9770 407 24.0 * 400.perlbench 9770 478 20.5 S 9770 406 24.0 S 400.perlbench 9770 478 20.5 * 9770 407 24.0 S 401.bzip2 9650 633 15.2 S 9650 619 15.6 * 401.bzip2 9650 630 15.3 * 9650 617 15.6 S 401.bzip2 9650 630 15.3 S 9650 620 15.6 S 403.gcc 8050 355 22.7 S 8050 355 22.7 S 403.gcc 8050 356 22.6 * 8050 354 22.7 S 403.gcc 8050 356 22.6 S 8050 354 22.7 * 429.mcf 9120 196 46.6 * 9120 196 46.6 * 429.mcf 9120 195 46.7 S 9120 195 46.7 S 429.mcf 9120 199 45.9 S 9120 199 45.9 S 445.gobmk 10490 652 16.1 S 10490 596 17.6 S 445.gobmk 10490 652 16.1 * 10490 596 17.6 * 445.gobmk 10490 653 16.1 S 10490 596 17.6 S 456.hmmer 9330 265 35.2 * 9330 259 36.0 * 456.hmmer 9330 265 35.2 S 9330 259 36.1 S 456.hmmer 9330 265 35.3 S 9330 260 35.9 S 458.sjeng 12100 631 19.2 * 12100 633 19.1 S 458.sjeng 12100 631 19.2 S 12100 632 19.2 S 458.sjeng 12100 631 19.2 S 12100 632 19.1 * 462.libquantum 20720 10.5 1970 * 20720 10.5 1970 * 462.libquantum 20720 10.5 1970 S 20720 10.5 1970 S 462.libquantum 20720 10.5 1970 S 20720 10.5 1970 S 464.h264ref 22130 774 28.6 S 22130 607 36.5 S 464.h264ref 22130 766 28.9 S 22130 610 36.3 S 464.h264ref 22130 769 28.8 * 22130 608 36.4 * 471.omnetpp 6250 314 19.9 S 6250 224 27.9 S 471.omnetpp 6250 313 20.0 S 6250 225 27.8 * 471.omnetpp 6250 314 19.9 * 6250 226 27.6 S 473.astar 7020 344 20.4 * 7020 344 20.4 * 473.astar 7020 338 20.7 S 7020 338 20.7 S 473.astar 7020 345 20.3 S 7020 345 20.3 S 483.xalancbmk 6900 196 35.3 S 6900 189 36.6 S 483.xalancbmk 6900 196 35.2 * 6900 188 36.7 S 483.xalancbmk 6900 198 34.8 S 6900 188 36.7 * ============================================================================== 400.perlbench 9770 478 20.5 * 9770 407 24.0 * 401.bzip2 9650 630 15.3 * 9650 619 15.6 * 403.gcc 8050 356 22.6 * 8050 354 22.7 * 429.mcf 9120 196 46.6 * 9120 196 46.6 * 445.gobmk 10490 652 16.1 * 10490 596 17.6 * 456.hmmer 9330 265 35.2 * 9330 259 36.0 * 458.sjeng 12100 631 19.2 * 12100 632 19.1 * 462.libquantum 20720 10.5 1970 * 20720 10.5 1970 * 464.h264ref 22130 769 28.8 * 22130 608 36.4 * 471.omnetpp 6250 314 19.9 * 6250 225 27.8 * 473.astar 7020 344 20.4 * 7020 344 20.4 * 483.xalancbmk 6900 196 35.2 * 6900 188 36.7 * SPECint(R)_base2006 34.6 SPECint2006 37.3 HARDWARE -------- CPU Name: Intel Xeon E5-2650L CPU Characteristics: Intel Turbo Boost Technology up to 2.30 GHz CPU MHz: 1800 FPU: Integrated CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip CPU(s) orderable: 1,2 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 20 MB I+D on chip per chip Other Cache: None Memory: 128 GB (16 x 8 GB 2Rx4 PC3-12800R-11, ECC) Disk Subsystem: 1 X 600 GB 10000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE for Linux Auto Parallel: Yes File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V9.01 Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuration: Processor C6 Report set to Disabled Processor C1E set to Disabled CPU Performance set to HPC LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Sat Nov 10 19:27:57 2012 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2650L 0 @ 1.80GHz 2 "physical id"s (chips) 16 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 8 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 cache size : 20480 KB From /proc/meminfo MemTotal: 132101936 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 Nov 10 19:26 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 ext4 550G 9.9G 512G 2% / Additional information from dmidecode: Memory: 16x 0xCE00 M393B1K70DH0-YK0 8 GB 1600 MHz 2 rank (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64" OMP_NUM_THREADS = "16" Intel HT Technology=disable Binaries compiled on a system with 2 X Intel Xeon E5-2690 CPU + 128 GB memory using RHEL 6.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 429.mcf: -DSPEC_CPU_LP64 445.gobmk: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 464.h264ref: -DSPEC_CPU_LP64 471.omnetpp: -DSPEC_CPU_LP64 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -parallel -opt-prefetch -auto-p32 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -auto-p32 -Wl,-z,muldefs -L/smartheap -lsmartheap64 Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 400.perlbench: icc -m32 445.gobmk: icc -m32 464.h264ref: icc -m32 C++ benchmarks (except as noted below): icpc -m32 473.astar: icpc -m64 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 429.mcf: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div -prof-use(pass 2) -auto-ilp32 -opt-prefetch -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div -inline-calloc -opt-malloc-options=3 -auto-ilp32 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 -ansi-alias 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-ra-region-strategy=block -ansi-alias -Wl,-z,muldefs -L/smartheap -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -ansi-alias -Wl,-z,muldefs -L/smartheap -lsmartheap Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20120425.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 13:27:50 2014 by CPU2006 ASCII formatter v6932. Originally published on 4 December 2012.