SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C460 M4 (Intel Xeon E7-8891 v3, 2.80 GHz) Mon Apr 20 03:48:05 2015 CPU2006 License: 9019 Test date: Apr-2015 Test sponsor: Cisco Systems Hardware availability: May-2015 Tested by: Cisco Systems Software availability: Sep-2014 Base Base Base Peak Peak Peak Benchmarks Ref. Run Time Ratio Ref. Run Time Ratio -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 9770 243 40.3 S 400.perlbench 9770 243 40.2 * 400.perlbench 9770 244 40.0 S 401.bzip2 9650 394 24.5 * 401.bzip2 9650 394 24.5 S 401.bzip2 9650 393 24.6 S 403.gcc 8050 237 33.9 * 403.gcc 8050 237 33.9 S 403.gcc 8050 238 33.9 S 429.mcf 9120 160 57.0 S 429.mcf 9120 159 57.2 * 429.mcf 9120 159 57.3 S 445.gobmk 10490 362 28.9 S 445.gobmk 10490 363 28.9 * 445.gobmk 10490 364 28.8 S 456.hmmer 9330 135 69.3 * 456.hmmer 9330 135 69.3 S 456.hmmer 9330 135 69.2 S 458.sjeng 12100 356 34.0 * 458.sjeng 12100 356 34.0 S 458.sjeng 12100 355 34.0 S 462.libquantum 20720 2.81 7390 S 462.libquantum 20720 2.73 7580 * 462.libquantum 20720 2.69 7710 S 464.h264ref 22130 427 51.8 S 464.h264ref 22130 426 51.9 S 464.h264ref 22130 427 51.8 * 471.omnetpp 6250 138 45.2 S 471.omnetpp 6250 135 46.2 S 471.omnetpp 6250 137 45.5 * 473.astar 7020 210 33.5 * 473.astar 7020 210 33.4 S 473.astar 7020 210 33.5 S 483.xalancbmk 6900 104 66.2 * 483.xalancbmk 6900 105 65.4 S 483.xalancbmk 6900 104 66.4 S ============================================================================== 400.perlbench 9770 243 40.2 * 401.bzip2 9650 394 24.5 * 403.gcc 8050 237 33.9 * 429.mcf 9120 159 57.2 * 445.gobmk 10490 363 28.9 * 456.hmmer 9330 135 69.3 * 458.sjeng 12100 356 34.0 * 462.libquantum 20720 2.73 7580 * 464.h264ref 22130 427 51.8 * 471.omnetpp 6250 137 45.5 * 473.astar 7020 210 33.5 * 483.xalancbmk 6900 104 66.2 * SPECint(R)_base2006 64.5 SPECint2006 Not Run HARDWARE -------- CPU Name: Intel Xeon E7-8891 v3 CPU Characteristics: Intel Turbo Boost Technology up to 3.50 GHz CPU MHz: 2800 FPU: Integrated CPU(s) enabled: 40 cores, 4 chips, 10 cores/chip CPU(s) orderable: 1,2,3,4 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 45 MB I+D on chip per chip Other Cache: None Memory: 1 TB (64 x 16 GB 2Rx4 PC4-2133P-R, running at 1600 MHz) Disk Subsystem: 1 x 400 GB SSD SAS Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) 3.12.28-4-default Compiler: C/C++: Version 15.0.0.090 of Intel C++ Studio XE for Linux; Fortran: Version 15.0.0.090 of Intel Fortran Studio XE for Linux Auto Parallel: Yes File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: Not Applicable Other Software: Microquill SmartHeap V10.0 Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- CPU performance set to Enterprise Power Technology set to Energy-Efficient Energy Performance BIAS setting set to Balanced Performance Memory RAS configuration set to Maximum Performance Memory Power Saving Mode set to Disabled Intel Hyper-Threading Technology option set to Disabled Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6914 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1 running on linux-gj2z Mon Apr 20 00:48:06 2015 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E7-8891 v3 @ 2.80GHz 4 "physical id"s (chips) 40 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 10 siblings : 10 physical 0: cores 0 1 2 4 6 8 17 19 20 23 physical 1: cores 0 1 2 4 6 8 17 19 20 23 physical 2: cores 0 1 2 4 6 8 17 19 20 23 physical 3: cores 0 1 2 4 6 8 17 19 20 23 cache size : 46080 KB From /proc/meminfo MemTotal: 1058834680 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 0 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12" VERSION_ID="12" PRETTY_NAME="SUSE Linux Enterprise Server 12" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12" uname -a: Linux linux-gj2z 3.12.28-4-default #1 SMP Thu Sep 25 17:02:34 UTC 2014 (9879bd4) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Apr 19 23:19 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 xfs 229G 59G 170G 26% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C460M4.2.0.4.20.040420150215 04/04/2015 Memory: 64x 0xCE00 M393A2G40DB0-CPB 16 GB 2 rank 1600 MHz 32x NO DIMM NO DIMM 1600 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: KMP_AFFINITY = "granularity=fine,scatter" LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64:/opt/cpu2006-1.2/sh" OMP_NUM_THREADS = "40" Binaries compiled on a system with 1x Core i5-4670K CPU + 16GB memory using RedHat EL 7.0 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Base Compiler Invocation ------------------------ C benchmarks: icc -m64 C++ benchmarks: icpc -m64 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 429.mcf: -DSPEC_CPU_LP64 445.gobmk: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 464.h264ref: -DSPEC_CPU_LP64 471.omnetpp: -DSPEC_CPU_LP64 473.astar: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -parallel -opt-prefetch -auto-p32 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -opt-prefetch -auto-p32 -Wl,-z,muldefs -L/sh -lsmartheap64 Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150505.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic15.0-official-linux64.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revC.20150505.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2015 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue May 5 15:16:09 2015 by CPU2006 ASCII formatter v6932. Originally published on 5 May 2015.