SPEC® CINT2006 Result

Copyright 2006-2016 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS B420 M4 (Intel Xeon E5-4650 v4, 2.20
GHz)

CPU2006 license: 9019 Test date: Nov-2016
Test sponsor: Cisco Systems Hardware Availability: Jun-2016
Tested by: Cisco Systems Software Availability: Dec-2015
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5-4650 v4
CPU Characteristics: Intel Turbo Boost Technology up to 2.80 GHz
CPU MHz: 2200
FPU: Integrated
CPU(s) enabled: 56 cores, 4 chips, 14 cores/chip, 2 threads/core
CPU(s) orderable: 2,4 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 35 MB I+D on chip per chip
Other Cache: None
Memory: 1 TB (32 x 32 GB 2Rx4 PC4-2400T-R)
Disk Subsystem: 1 x 300 GB SAS, 15K RPM
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 12 SP1 (x86_64)
3.12.49-11-default
Compiler: C/C++: Version 16.0.0.101 of Intel C++ Studio XE
for Linux
Auto Parallel: No
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V10.2

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 112 689 1590 690 1590 692 1580 112 557 1960 558 1960 557 1960
401.bzip2 112 1028 1050 1022 1060 1021 1060 112 991 1090 990 1090 992 1090
403.gcc 112 548 1650 546 1650 541 1670 112 547 1650 544 1660 543 1660
429.mcf 112 343 2980 342 2990 342 2990 112 343 2980 342 2990 342 2990
445.gobmk 112 819 1430 819 1430 819 1430 112 805 1460 806 1460 805 1460
456.hmmer 112 335 3120 333 3140 332 3150 112 288 3630 289 3620 288 3620
458.sjeng 112 916 1480 916 1480 917 1480 112 868 1560 868 1560 868 1560
462.libquantum 112 113 20500 113 20500 113 20500 112 113 20500 113 20500 113 20500
464.h264ref 112 933 2660 924 2680 928 2670 112 906 2730 905 2740 907 2730
471.omnetpp 112 583 1200 583 1200 583 1200 112 552 1270 552 1270 553 1270
473.astar 112 618 1270 618 1270 619 1270 112 618 1270 618 1270 619 1270
483.xalancbmk 112 297 2600 297 2600 297 2610 112 297 2600 297 2600 297 2610

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
CPU performance set to Enterprise
Power Technology set to Energy Efficient
Energy Performance set to Balanced Performance
Memory RAS configuration set to Maximum Performance
Memory Power Saving Mode set to Disabled
QPI Snoop Mode set to Cluster-on-Die
 Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6914
 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1
 running on linux-me8v Sat Nov 12 11:53:28 2016

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E5-4650 v4 @ 2.20GHz
       4 "physical id"s (chips)
       112 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 14
       siblings  : 28
       physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
       physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
       physical 2: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
       physical 3: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14
    cache size : 17920 KB

 From /proc/meminfo
    MemTotal:       1058689056 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    SUSE Linux Enterprise Server 12 SP1

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 1
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP1"
       VERSION_ID="12.1"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP1"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp1"

 uname -a:
    Linux linux-me8v 3.12.49-11-default #1 SMP Wed Nov 11 20:52:43 UTC 2015
    (8d714a0) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Nov 12 11:52

 SPEC is set to: /home/cpu2006-1.2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sdb7      xfs   236G  7.4G  229G   4% /home
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Cisco Systems, Inc. B420M4.3.1.2.0.052320161053 05/23/2016
   Memory:
    32x 0xCE00 M393A4K40BB1-CRC 32 GB 2 rank 2400 MHz
    16x NO DIMM NO DIMM

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006-1.2/libs/32:/home/cpu2006-1.2/libs/64:/home/cpu2006-1.2/sh"

 Binaries compiled on a system with 1x Intel Core i5-4670K CPU + 32GB
 memory using RedHat EL 7.1
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 

C++ benchmarks:

 icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 

Base Portability Flags

400.perlbench:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -D_FILE_OFFSET_BITS=64 
403.gcc:  -D_FILE_OFFSET_BITS=64 
429.mcf:  -D_FILE_OFFSET_BITS=64 
445.gobmk:  -D_FILE_OFFSET_BITS=64 
456.hmmer:  -D_FILE_OFFSET_BITS=64 
458.sjeng:  -D_FILE_OFFSET_BITS=64 
462.libquantum:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 
464.h264ref:  -D_FILE_OFFSET_BITS=64 
471.omnetpp:  -D_FILE_OFFSET_BITS=64 
473.astar:  -D_FILE_OFFSET_BITS=64 
483.xalancbmk:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3   -Wl,-z,muldefs   -L/sh -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 
400.perlbench:  icc -m64 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 

C++ benchmarks:

 icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 

Peak Portability Flags

400.perlbench:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX_X64 
401.bzip2:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64 
403.gcc:  -D_FILE_OFFSET_BITS=64 
429.mcf:  -D_FILE_OFFSET_BITS=64 
445.gobmk:  -D_FILE_OFFSET_BITS=64 
456.hmmer:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64 
458.sjeng:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64 
462.libquantum:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 
464.h264ref:  -D_FILE_OFFSET_BITS=64 
471.omnetpp:  -D_FILE_OFFSET_BITS=64 
473.astar:  -D_FILE_OFFSET_BITS=64 
483.xalancbmk:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -auto-ilp32 
401.bzip2:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32   -ansi-alias 
403.gcc:  -xCORE-AVX2   -ipo   -O3   -no-prec-div 
429.mcf:  basepeak = yes 
445.gobmk:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -prof-use(pass 2)   -par-num-threads=1(pass 1)   -ansi-alias   -opt-mem-layout-trans=3 
456.hmmer:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -unroll2   -auto-ilp32 
458.sjeng:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  basepeak = yes 
464.h264ref:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/sh -lsmartheap 
473.astar:  basepeak = yes 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revE.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revE.xml.

SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2016 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Tue Nov 29 19:07:59 2016 by SPEC CPU2006 HTML formatter v6932.
Originally published on 29 November 2016.