SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C480 M5 (Intel Xeon Gold 6146 3.20GHz) Fri Aug 18 23:54:41 2017 CPU2006 License: 9019 Test date: Aug-2017 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Apr-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 96 420 2230 S 96 349 2690 S 400.perlbench 96 420 2230 * 96 348 2700 * 400.perlbench 96 420 2230 S 96 347 2700 S 401.bzip2 96 702 1320 * 96 675 1370 S 401.bzip2 96 701 1320 S 96 680 1360 S 401.bzip2 96 704 1320 S 96 675 1370 * 403.gcc 96 356 2170 S 96 355 2180 S 403.gcc 96 356 2170 * 96 353 2190 S 403.gcc 96 354 2180 S 96 354 2180 * 429.mcf 96 221 3960 S 96 221 3960 S 429.mcf 96 222 3940 S 96 222 3940 S 429.mcf 96 221 3950 * 96 221 3950 * 445.gobmk 96 572 1760 S 96 575 1750 S 445.gobmk 96 571 1760 S 96 573 1760 S 445.gobmk 96 571 1760 * 96 574 1760 * 456.hmmer 96 208 4300 S 96 166 5410 * 456.hmmer 96 209 4300 * 96 165 5430 S 456.hmmer 96 209 4280 S 96 166 5400 S 458.sjeng 96 618 1880 * 96 574 2020 * 458.sjeng 96 619 1880 S 96 575 2020 S 458.sjeng 96 618 1880 S 96 573 2030 S 462.libquantum 96 39.8 50000 S 96 39.8 50000 S 462.libquantum 96 39.7 50100 * 96 39.7 50100 * 462.libquantum 96 39.7 50100 S 96 39.7 50100 S 464.h264ref 96 664 3200 S 96 647 3290 * 464.h264ref 96 674 3150 S 96 634 3350 S 464.h264ref 96 666 3190 * 96 649 3270 S 471.omnetpp 96 429 1400 S 96 395 1520 * 471.omnetpp 96 428 1400 S 96 395 1520 S 471.omnetpp 96 429 1400 * 96 394 1520 S 473.astar 96 393 1720 * 96 393 1720 * 473.astar 96 393 1720 S 96 393 1720 S 473.astar 96 393 1710 S 96 393 1710 S 483.xalancbmk 96 186 3550 * 96 186 3550 * 483.xalancbmk 96 186 3550 S 96 186 3550 S 483.xalancbmk 96 187 3550 S 96 187 3550 S ============================================================================== 400.perlbench 96 420 2230 * 96 348 2700 * 401.bzip2 96 702 1320 * 96 675 1370 * 403.gcc 96 356 2170 * 96 354 2180 * 429.mcf 96 221 3950 * 96 221 3950 * 445.gobmk 96 571 1760 * 96 574 1760 * 456.hmmer 96 209 4300 * 96 166 5410 * 458.sjeng 96 618 1880 * 96 574 2020 * 462.libquantum 96 39.7 50100 * 96 39.7 50100 * 464.h264ref 96 666 3190 * 96 647 3290 * 471.omnetpp 96 429 1400 * 96 395 1520 * 473.astar 96 393 1720 * 96 393 1720 * 483.xalancbmk 96 186 3550 * 96 186 3550 * SPECint(R)_rate_base2006 2980 SPECint_rate2006 3140 HARDWARE -------- CPU Name: Intel Xeon Gold 6146 CPU Characteristics: Intel Turbo Boost Technology up to 4.20 GHz CPU MHz: 3200 FPU: Integrated CPU(s) enabled: 48 cores, 4 chips, 12 cores/chip, 2 threads/core CPU(s) orderable: 2,4 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 24.75 MB I+D on chip per chip Other Cache: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2666V-R) Disk Subsystem: 1 x 400 GB SAS SSD Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default Compiler: C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux Auto Parallel: Yes File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on linux-g83b Fri Aug 18 20:54:42 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6146 CPU @ 3.20GHz 4 "physical id"s (chips) 96 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 4 9 10 16 18 19 25 26 physical 1: cores 0 1 2 3 4 9 10 16 18 19 25 26 physical 2: cores 0 1 2 3 4 8 9 11 17 18 19 20 physical 3: cores 0 1 2 3 8 9 10 11 18 19 24 27 cache size : 25344 KB From /proc/meminfo MemTotal: 1583704544 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-g83b 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Aug 18 20:26 SPEC is set to: /home/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb7 xfs 416G 19G 398G 5% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C480M5.3.1.0.245.0514171056 05/14/2017 Memory: 48x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006-1.2/lib/ia32:/home/cpu2006-1.2/lib/intel64:/home/cpu2006-1.2/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -auto-ilp32 -qopt-mem-layout-trans=3 401.bzip2: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-prefetch -auto-ilp32 -qopt-mem-layout-trans=3 403.gcc: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 429.mcf: basepeak = yes 445.gobmk: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-mem-layout-trans=3 456.hmmer: -xCORE-AVX512 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 -qopt-mem-layout-trans=3 458.sjeng: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -auto-ilp32 -qopt-mem-layout-trans=3 462.libquantum: basepeak = yes 464.h264ref: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll2 -qopt-mem-layout-trans=3 C++ benchmarks: 471.omnetpp: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-ra-region-strategy=block -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2017 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Sep 6 11:46:28 2017 by CPU2006 ASCII formatter v6932. Originally published on 5 September 2017.