SPEC® CINT2006 Result

Copyright 2006-2017 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS B480 M5 (Intel Xeon Gold 5115,
2.40 GHz)

CPU2006 license: 9019 Test date: Nov-2017
Test sponsor: Cisco Systems Hardware Availability: Aug-2017
Tested by: Cisco Systems Software Availability: Sep-2017
Benchmark results graph
Hardware
CPU Name: Intel Xeon Gold 5115
CPU Characteristics: Intel Turbo Boost Technology up to 3.20 GHz
CPU MHz: 2400
FPU: Integrated
CPU(s) enabled: 40 cores, 4 chips, 10 cores/chip, 2 threads/core
CPU(s) orderable: 2,4 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 1 MB I+D on chip per core
L3 Cache: 13.75 MB I+D on chip per chip
Other Cache: None
Memory: 768 GB (48 x 16 GB 2Rx4 PC4-2666V-R,
running at 2400)
Disk Subsystem: 1 x 600 GB SAS HDD, 10K RPM
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64)
4.4.21-69-default
Compiler: C/C++: Version 18.0.0.128 of Intel C/C++
Compiler for Linux
Auto Parallel: Yes
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V10.2

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 80 544   1440 545   1430 547   1430 80 453   1730 455   1720 454   1720
401.bzip2 80 892   865 898   860 891   867 80 849   909 853   905 844   914
403.gcc 80 459   1400 460   1400 462   1390 80 449   1440 451   1430 451   1430
429.mcf 80 266   2740 268   2730 267   2730 80 266   2740 268   2730 267   2730
445.gobmk 80 675   1240 676   1240 675   1240 80 682   1230 682   1230 680   1230
456.hmmer 80 270   2770 269   2780 270   2760 80 225   3320 225   3320 225   3320
458.sjeng 80 729   1330 731   1320 731   1320 80 691   1400 690   1400 691   1400
462.libquantum 80 45.4 36500 45.4 36500 45.5 36500 80 45.4 36500 45.4 36500 45.5 36500
464.h264ref 80 793   2230 819   2160 801   2210 80 747   2370 760   2330 780   2270
471.omnetpp 80 484   1030 486   1030 486   1030 80 443   1130 443   1130 443   1130
473.astar 80 490   1150 489   1150 490   1150 80 490   1150 489   1150 490   1150
483.xalancbmk 80 232   2370 233   2370 233   2370 80 232   2370 233   2370 233   2370

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6993
 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1)
 running on linux-vb5q Sat Jan  2 15:32:27 2010

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 5115 CPU @ 2.40GHz
       4 "physical id"s (chips)
       80 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 10
       siblings  : 20
       physical 0: cores 0 1 2 3 4 8 9 10 11 12
       physical 1: cores 0 1 2 3 4 8 9 10 11 12
       physical 2: cores 0 1 2 3 4 8 9 10 11 12
       physical 3: cores 0 1 2 3 4 8 9 10 11 12
    cache size : 14080 KB

 From /proc/meminfo
    MemTotal:       791804484 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-vb5q 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016
    (9464f67) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Jan 2 15:32

 SPEC is set to: /opt/cpu2006-1.2
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda1      xfs   280G   24G  256G   9% /
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS Cisco Systems, Inc. B480M5.3.2.2a.0.0919171641 09/19/2017
   Memory:
    48x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz, configured at 2400 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/opt/intel/lib/ia32:/opt/intel/lib/intel64:/opt/cpu2006-1.2/sh10.2"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 

C++ benchmarks:

 icpc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 

Base Portability Flags

400.perlbench:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -D_FILE_OFFSET_BITS=64 
403.gcc:  -D_FILE_OFFSET_BITS=64 
429.mcf:  -D_FILE_OFFSET_BITS=64 
445.gobmk:  -D_FILE_OFFSET_BITS=64 
456.hmmer:  -D_FILE_OFFSET_BITS=64 
458.sjeng:  -D_FILE_OFFSET_BITS=64 
462.libquantum:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 
464.h264ref:  -D_FILE_OFFSET_BITS=64 
471.omnetpp:  -D_FILE_OFFSET_BITS=64 
473.astar:  -D_FILE_OFFSET_BITS=64 
483.xalancbmk:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xHOST   -ipo   -O3   -no-prec-div   -qopt-prefetch   -qopt-mem-layout-trans=3 

C++ benchmarks:

 -xHOST   -ipo   -O3   -no-prec-div   -qopt-prefetch   -qopt-mem-layout-trans=3   -Wl,-z,muldefs   -L/opt/cpu2006-1.2/sh10.2 -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 
400.perlbench:  icc -m64 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 

C++ benchmarks:

 icpc -m32 -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX_X64 
401.bzip2:  -DSPEC_CPU_LP64 
403.gcc:  -D_FILE_OFFSET_BITS=64 
429.mcf:  -D_FILE_OFFSET_BITS=64 
445.gobmk:  -D_FILE_OFFSET_BITS=64 
456.hmmer:  -DSPEC_CPU_LP64 
458.sjeng:  -DSPEC_CPU_LP64 
462.libquantum:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 
464.h264ref:  -D_FILE_OFFSET_BITS=64 
471.omnetpp:  -D_FILE_OFFSET_BITS=64 
473.astar:  -D_FILE_OFFSET_BITS=64 
483.xalancbmk:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -prof-gen(pass 1)   -prof-use(pass 2)   -xHOST(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -auto-ilp32   -qopt-mem-layout-trans=3 
401.bzip2:  -prof-gen(pass 1)   -prof-use(pass 2)   -xHOST(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -qopt-prefetch   -auto-ilp32   -qopt-mem-layout-trans=3 
403.gcc:  -xHOST   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3 
429.mcf:  basepeak = yes 
445.gobmk:  -prof-gen(pass 1)   -prof-use(pass 2)   -xHOST(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -qopt-mem-layout-trans=3 
456.hmmer:  -xHOST   -ipo   -O3   -no-prec-div   -unroll2   -auto-ilp32   -qopt-mem-layout-trans=3 
458.sjeng:  -prof-gen(pass 1)   -prof-use(pass 2)   -xHOST(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll4   -auto-ilp32   -qopt-mem-layout-trans=3 
462.libquantum:  basepeak = yes 
464.h264ref:  -prof-gen(pass 1)   -prof-use(pass 2)   -xHOST(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -unroll2   -qopt-mem-layout-trans=3 

C++ benchmarks:

471.omnetpp:  -prof-gen(pass 1)   -prof-use(pass 2)   -xHOST(pass 2)   -par-num-threads=1(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -qopt-ra-region-strategy=block    -qopt-mem-layout-trans=3   -Wl,-z,muldefs   -L/opt/cpu2006-1.2/sh10.2 -lsmartheap 
473.astar:  basepeak = yes 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml.

SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2017 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Mon Dec 11 11:12:26 2017 by SPEC CPU2006 HTML formatter v6932.
Originally published on 9 December 2017.