SPEC CPU2006 Platform Settings for Lenovo Systems

Operating System Tuning Parameters

This OS setting controls the amount of run-time(bandwidth) transferred to a run queue from the task's control group bandwidth pool. Small values allow the global bandwidth to be shared in a fine-grained manner among tasks, larger values reduce transfer overhead. The default value is 5000 (ns).
This OS setting configures targeted preemption latency for CPU bound tasks. The default value is 24000000 (ns).
Amount of time after the last execution that a task is considered to be "cache hot" in migration decisions. A "hot" task is less likely to be migrated to another CPU, so increasing this variable reduces task migrations. The default value is 500000 (ns).
This OS setting controls the minimal preemption granularity for CPU bound tasks. As the number of runnable tasks increases, CFS(Complete Fair Scheduler), the scheduler of the Linux kernel, decreases the timeslices of tasks. If the number of runnable tasks exceeds sched_latency_ns/sched_min_granularity_ns, the timeslice becomes number_of_running_tasks * sched_min_granularity_ns. The default value is 8000000 (ns).
This OS setting controls the wake-up preemption granularity. Increasing this variable reduces wake-up preemption, reducing disturbance of compute bound tasks. Lowering it improves wake-up latency and throughput for latency critical tasks, particularly when a short duty cycle load component must compete with CPU bound components. The default value is 10000000 (ns).
This OS setting controls automatic NUMA balancing on memory mapping and process placement. Setting 0 disables this feature. It is enabled by default (1).

Firmware / BIOS / Microcode Settings

Operating Modes Selections: (Default="Efficiency -Favor Performance")
The average customer doesn't know the best way to set each individual power/performance feature for their specific environment. Because of this, a menu option is provided that can help a customer optimize the system for things such as minimum power usage/acoustic levels, maximum efficiency, Energy Star optimization, or maximum performance.
C-states reduce CPU idle power. There are three options in this mode: Legacy, Autonomous, Disable.
C1 Enhanced Mode:
Enabling C1E (C1 enhanced) state can save power by halting CPU cores that are idle.
Turbo Mode:
Enabling turbo mode can boost the overall CPU performance when all CPU cores are not being fully utilized. A CPU core can run above its rated frequency for a short perios of time when it is in turbo mode.
Enabling Hyper-Threading let operating system addresses two virtual or logical cores for a physical presented core. Workloads can be shared between virtual or logical cores when possible. The main function of hyper-threading is to increase the number of independent instructions in the pipeline for using the processor resources more efficiently.
Execute Disable Bit:
The execute disable bit allows memory to be marked as executable or non-executable when used with a supporting operating system. This can improve system security by configuring the processor to raise an error to the operating system when code attempts to run in non-executable memory.
DCA capable I/O devices such as network controllers can place data directly into the CPU cache, which improves response time.
Power/Performance Bias:
Power/Performance bias determines how aggressively the CPU will be power managed and placed into turbo. With "Platform Controlled", the system controls the setting. Selecting "OS Controlled" allows the operating system to control it.
Per Core P-state:
When per-core P-states are enabled, each physical CPU core can operate at separate frequencies. If disabled, all cores in a package will operate at the highest resolved frequency of all active threads.
CPU Frequency Limits:
The maximum turbo frequency can be restricted with turbo limiting to a frequency that is between the maximum turbo frequency and the rated frequency for the CPU installed.
Energy Efficient Turbo:
When energy efficient turbo is enabled, the CPU's optimal turbo frequency will be tuned dynamically based on CPU utilization.
Uncore Frequency Scaling:
When enabled, the CPU uncore will dynamically change speed based on the workload.
MONITOR/MWAIT instructions are used to engage C-states.
Sub-NUMA Cluster (SNC):
SNC breaks up the last level cache (LLC) into disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. SNC improves average latency to the LLC and memory. SNC is a replacement for the cluster on die (COD) feature found in previous processor families. For a multi-socketed system, all SNC clusters are mapped to unique NUMA domains. (See also IMC interleaving.) Values for this BIOS option can be:
Snoop Preference:
Select the appropriate snoop mode based on the workload. There are two snoop modes: "HS w. Directory + OSB +HitME cache" and "Home Snoop". Default is "HS w. Directory + OSB +HitME cache".
XPT Prefetcher
XPT prefetch is a mechanism that enables a read request that is being sent to the last level cache to speculatively issue a copy of that read to the memory controller prefetching
UPI Prefetcher
UPI prefetch is a mechanism to get the memroy read started early on DDR bus. The UPI receive path will spawn a memory read to the memory controller prefetcher.
Patrol Scrub:
Patrol Scrub is a memory RAS feature which runs a background memory scrub against all DIMMs. Can negatively impact performance.
DCU Streamer Prefetcher:
DCU (Level 1 Data Cache) streamer prefetcher is an L1 data cache prefetcher. Lightly threaded applications and some benchmarks can benefit from having the DCU streamer prefetcher enabled. Default setting is Enable.
Stale A to S
The in-memory directory has three states: invalid (I), snoopAll (A), and shared (S). Invalid (I) state means the data is clean and does not exist in any other socket`s cache. The snoopAll (A) state means the data may exist in another socket in exclusive or modified state. Shared (S) state means the data is clean and may be shared across one or more socket`s caches. When doing a read to memory, if the directory line is in the A state we must snoop all the other sockets because another socket may have the line in modified state. If this is the case, the snoop will return the modified data. However, it may be the case that a line is read in A state and all the snoops come back a miss. This can happen if another socket read the line earlier and then silently dropped it from its cache without modifying it. Values for this BIOS option can be: Stale A to S may be beneficial in a workload where there are many cross-socket reads.
LLC Dead Line Allocation
In some Intel CPU caching schemes, mid-level cache (MLC) evictions are filled into the last level cache (LLC). If a line is evicted from the MLC to the LLC, the core can flag the evicted MLC lines as "dead." This means that the lines are not likely to be read again. This option allows dead lines to be dropped and never fill the LLC if the option is disabled. Values for this BIOS option can be:
Adjacent Cache Prefetch:
Lightly threaded applications and some benchmarks can benefit from having the adjacent cache line prefetch enabled. Default is enable.
Intel Virtualization Technology:
Intel Virtualization Technology allows a platform to run multiple operating systems and applications in independent partitions, so that one computer system can function as multiple virtual system. Default is enable.
Hardware Prefethcer:
Lightly threaded applications and some benchmarks can benefit from having the hardware prefetcher enabled. Default is enable.
Trusted Execution Technology:
Enable Intel Trusted Execution Technology (Intel TXT). Default is disable.
Acounstic Mode
By using acoustic mode, the user has some control over the fan speeds and airflow (and noise) that is produced by the system fans. This mode can be used for noise or airflow concerns in the user environment. As a result, Mode1,2,3,4,5 increase the possibility that the node might have to be throttled to maintain cooling within the fan speed limitation. If there is power or thermal demanding PCI card installed in the chassis, acoustic mode is automatically disabled.