CPU2017 Flag Description
Fujitsu PRIMERGY RX2560 M2, Intel Xeon E5-2699A v4, 2.40GHz

Copyright © 2016 Intel Corporation. All Rights Reserved.


Base Compiler Invocation

C benchmarks

C++ benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using both C and C++

Benchmarks using Fortran, C, and C++


Base Portability Flags

503.bwaves_r

507.cactuBSSN_r

508.namd_r

510.parest_r

511.povray_r

519.lbm_r

521.wrf_r

526.blender_r

527.cam4_r

538.imagick_r

544.nab_r

549.fotonik3d_r

554.roms_r


Base Optimization Flags

C benchmarks

C++ benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using both C and C++

Benchmarks using Fortran, C, and C++


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY
Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
    granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
    compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
    scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.

Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.

Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.

Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Firmware / BIOS / Microcode Settings

Utilization Profile:
This BIOS switch allows 2 options: "Even" and "Unbalanced". The default is "Even" and the best choice for all workloads utilizing the whole system. In cases where the utilization is highly concentrated on few resources of the system the performance of the application could be improved by setting to "Unbalanced".
Setting this option to "Unbalanced" may improve performance but also increase the power consumption of the system. Users should only select this option after performing application benchmarking to verify improved performance in their environment.
Energy Performance:
This BIOS switch allows 4 options: "Balanced performance", "Performance", "Balanced Energy" and "Energy Efficient". The default is "Balanced Performance" optimized to maximum power savings with minimal impact on performance. "Performance" disables all power management options with any impact on performance. "Balanced Energy" is optimized for power efficiency and "Energy Efficient" for power savings. The BIOS switch is only selectable if the BIOS switch "Power Technology" is set to "Custom".
The two options "Balanced Performance" and "Balanced Energy" should always be the first choice as both options optimize the efficiency of the system. In cases where the performance is not sufficient or the power consumption is too high the two options "Performance" or "Energy Efficient" could be an alternative.
QPI snoop mode:
There are 4 snoop mode options for how to maintain cache coherency across the Intel QPI fabric, each with varying memory latency & bandwidth characteristics depending on how the snoop traffic is generated.
There are 3 BIOS switches to select one of these 4 modes.The corresponding settings are given below together with the description of the 4 snoop modes.

Cluster on Die
(BIOS switch settings to enable this mode: "COD Enable" = Enabled and "Early Snoop" = Disabled and "Home Snoop Dir OSB" = Disabled)
This mode logically splits a socket into 2 NUMA domains that are exposed to the OS with half the amount of cores & LLC assigned to each NUMA domain in a socket. This mode utilizes an on-die directory cache & in memory directory bits to determine whether a snoop needs to be sent. Use this mode for highly NUMA optimized workloads to get the lowest local memory latency & highest local memory bandwidth for NUMA workloads.

"Home Directory Snoop with OSB" is the Opportunistic Snoop Broadcast (OSB) directory mode. The HA can choose to do a speculative home snoop broadcast even before the directory information has been collected and checked.

In "Home Snoop" and "Early Snoop" modes, snoops are always sent -- they just originate from different places: the caching agent (earlier) in "Early Snoop" mode and the home agent (later) in "Home Snoop" mode.

Home Snoop
(BIOS switch settings to enable this mode: "COD Enable" = Disabled and "Early Snoop" = Disabled and "Home Snoop Dir OSB" = Disabled)
Use Home Snoop mode for NUMA workloads that are memory bandwidth sensitive and need both local & remote memory bandwidth.

Early Snoop
(BIOS switch settings to enable this mode: "COD Enable" = Disabled and "Early Snoop" = Enabled and "Home Snoop Dir OSB" = Disabled)
Use Early Snoop mode for workloads that are memory latency sensitive or for workloads that benefit from fast cache-to-cache transfer latencies from the remote socket. Snoops are sent out earlier, which is why memory latency is lower in this mode.

Home Directory Snoop with OSB
(BIOS switch settings to enable this mode: "COD Enable" = Disabled and "Early Snoop" = Disabled and "Home Snoop Dir OSB" = Enabled)
Use Home Directory Snoop with OSB under very lightly loaded conditions.
CPU C1E Support
Enabling this option which is the default allows the processor to transmit to its minimum frequency when entering the power state C1. If the switch is disabled the CPU stays at its maximum frequency in C1. Because of the increase of power consumption users should only select this option after performing application benchmarking to verify improved performance in their environment.
QPI Link Frequency Select
This switch allows the configuration of the QPI link speed. Default is auto, which configures the optimal link speed automatically.
Uncore Frequency Override
This switch configures the processor uncore frequency to improve the I/O performance. 3 options are available.

Disabled (default)
The processor autonomously controls the frequency in a predefined range to save power.

Maximim Enabled
The frequency is always set to its predefined maximum. This may result in an increased power consumption.

Nominal
The processor autonomously controls the frequency in a predefined range to save power, but not above its nominal frequency.
EMCA gen2
Enhanced MCA is a new Xeon RAS capability that allows firmware to enhance the error logging capabilities of Machine Check Architecture. Enhanced MCA can be configured to provide more information to the software layer about error conditions enabling better recovery and better error identification. Enhanced MCA should be enabled only with supported OS or VMM.

Disabled
EMCA Gen2 is disabled.

Enabled
EMCA Gen2 is enabled.

Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic17.0-official-linux64-revD.html,
http://www.spec.org/cpu2017/flags/Fujitsu-Platform-Settings-V1.2-BDW-RevD.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic17.0-official-linux64-revD.xml,
http://www.spec.org/cpu2017/flags/Fujitsu-Platform-Settings-V1.2-BDW-RevD.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2018 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v0.904.0.
Report generated on 2018-02-12 10:03:11 by SPEC CPU2017 flags formatter v5178.