SPEC(R) CPU2017 Floating Point Rate Result Hewlett Packard Enterprise ProLiant DL360 Gen10 (3.00 GHz, Intel Xeon Gold 6136) Test Sponsor: HPE CPU2017 License: 3 Test date: Oct-2017 Test sponsor: HPE Hardware availability: Oct-2017 Tested by: HPE Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 48 1039 463 * 503.bwaves_r 48 1039 463 S 503.bwaves_r 48 1039 463 S 507.cactuBSSN_r 48 474 128 S 507.cactuBSSN_r 48 472 129 S 507.cactuBSSN_r 48 473 128 * 508.namd_r 48 404 113 S 508.namd_r 48 403 113 * 508.namd_r 48 402 113 S 510.parest_r 48 1126 112 S 510.parest_r 48 1123 112 S 510.parest_r 48 1123 112 * 511.povray_r 48 627 179 S 511.povray_r 48 628 178 * 511.povray_r 48 628 178 S 519.lbm_r 48 527 96.0 S 519.lbm_r 48 526 96.1 * 519.lbm_r 48 526 96.2 S 521.wrf_r 48 552 195 S 521.wrf_r 48 559 192 S 521.wrf_r 48 553 194 * 526.blender_r 48 464 158 S 526.blender_r 48 462 158 * 526.blender_r 48 456 160 S 527.cam4_r 48 484 173 * 527.cam4_r 48 482 174 S 527.cam4_r 48 487 172 S 538.imagick_r 48 489 244 S 538.imagick_r 48 489 244 * 538.imagick_r 48 490 244 S 544.nab_r 48 386 209 S 544.nab_r 48 385 210 S 544.nab_r 48 385 210 * 549.fotonik3d_r 48 1411 133 S 549.fotonik3d_r 48 1413 132 * 549.fotonik3d_r 48 1413 132 S 554.roms_r 48 856 89.1 S 554.roms_r 48 845 90.3 S 554.roms_r 48 850 89.8 * ================================================================================= 503.bwaves_r 48 1039 463 * 507.cactuBSSN_r 48 473 128 * 508.namd_r 48 403 113 * 510.parest_r 48 1123 112 * 511.povray_r 48 628 178 * 519.lbm_r 48 526 96.1 * 521.wrf_r 48 553 194 * 526.blender_r 48 462 158 * 527.cam4_r 48 484 173 * 538.imagick_r 48 489 244 * 544.nab_r 48 385 210 * 549.fotonik3d_r 48 1413 132 * 554.roms_r 48 850 89.8 * SPECrate2017_fp_base 159 SPECrate2017_fp_peak Not Run HARDWARE -------- CPU Name: Intel Xeon Gold 6136 Max MHz.: 3700 Nominal: 3000 Enabled: 24 cores, 2 chips, 2 threads/core Orderable: 1, 2 chip(s) Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 24.75 MB I+D on chip per chip Other: None Memory: 192 GB (24 x 8 GB 2Rx8 PC4-2666V-R) Storage: 1 x 480 GB SATA SSD, RAID 0 Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 (x86_64) SP2 Kernel 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: No Firmware: HPE BIOS Version U32 released Oct-2017 (tested with U32 9/29/2017) File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: Not Applicable Other: None Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runspec command invoked through numactl i.e.: numactl --interleave=all runspec irqbalance disabled with "service irqbalance stop" tuned profile set wtih "tuned-adm profile throughput-performance" VM Dirty ratio was set to 40 using "echo 40 > /proc/sys/vm/dirty_ratio" Numa balancing was disabled using "echo 0 > /proc/sys/kernel/numa_balancing" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/specuser/cpu2017/lib/ia32:/home/specuser/cpu2017/lib/intel64" LD_LIBRARY_PATH = "$LD_LIBRARY_PATH:/home/specuser/cpu2017/je5.0.1-32:/home/specuser/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling Memory Patrol Scrubbing set to Disabled LLC Prefetcher set to Enabled LLC Dead Line Allocation set to Disabled Stale A to S set to Enabled Workload Pofile set to Throughput Frequency Compute Minimum Processor Idle Power Core C-State set to C1E State Sysinfo program /home/specuser/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-0s5n Sat Oct 7 19:52:23 2017 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6136 CPU @ 3.00GHz 2 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 8 9 10 11 18 19 24 27 physical 1: cores 0 1 2 3 8 9 10 11 18 19 24 27 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 48 On-line CPU(s) list: 0-47 Thread(s) per core: 2 Core(s) per socket: 12 Socket(s): 2 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6136 CPU @ 3.00GHz Stepping: 4 CPU MHz: 2992.975 BogoMIPS: 5985.95 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 25344K NUMA node0 CPU(s): 0-5,24-29 NUMA node1 CPU(s): 6-11,30-35 NUMA node2 CPU(s): 12-17,36-41 NUMA node3 CPU(s): 18-23,42-47 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 25344 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 24 25 26 27 28 29 node 0 size: 47892 MB node 0 free: 42809 MB node 1 cpus: 6 7 8 9 10 11 30 31 32 33 34 35 node 1 size: 48382 MB node 1 free: 45404 MB node 2 cpus: 12 13 14 15 16 17 36 37 38 39 40 41 node 2 size: 48382 MB node 2 free: 45494 MB node 3 cpus: 18 19 20 21 22 23 42 43 44 45 46 47 node 3 size: 48265 MB node 3 free: 45376 MB node distances: node 0 1 2 3 0: 10 21 31 31 1: 21 10 31 31 2: 31 31 10 21 3: 31 31 21 10 From /proc/meminfo MemTotal: 197552060 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-0s5n 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Oct 7 15:28 SPEC is set to: /home/specuser/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb3 xfs 407G 157G 251G 39% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE U32 09/29/2017 Memory: 24x UNKNOWN NOT AVAILABLE 8 GB 2 rank 2666 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 519.lbm_r(base) 538.imagick_r(base) 544.nab_r(base) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 508.namd_r(base) 510.parest_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 511.povray_r(base) 526.blender_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 507.cactuBSSN_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 503.bwaves_r(base) 549.fotonik3d_r(base) 554.roms_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 521.wrf_r(base) 527.cam4_r(base) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using both C and C++: icpc icc Benchmarks using Fortran, C, and C++: icpc icc ifort Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 Fortran benchmarks: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 Benchmarks using Fortran, C, and C++: -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Base Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks: -m64 Fortran benchmarks: -m64 Benchmarks using both Fortran and C: -m64 -std=c11 Benchmarks using both C and C++: -m64 -std=c11 Benchmarks using Fortran, C, and C++: -m64 -std=c11 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-10-19.html http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revD.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-10-19.xml http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revD.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ------------------------------------------------------------------------------------------------------------ For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2017-10-07 20:52:23-0400. Report generated on 2018-10-31 14:34:21 by CPU2017 ASCII formatter v6067. Originally published on 2017-10-31.