SPEC® CPU2017 Integer Rate Result

Copyright 2017-2018 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS B480 M5 (Intel Xeon Gold 6136,
3.00 GHz)

SPECrate2017_int_base = 29200

SPECrate2017_int_peak = 30800

CPU2017 License: 9019 Test Date: Nov-2017
Test Sponsor: Cisco Systems Hardware Availability: Aug-2017
Tested by: Cisco Systems Software Availability: Sep-2017

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6136
  Max MHz.: 3700
  Nominal: 3000
Enabled: 48 cores, 4 chips, 2 threads/core
Orderable: 2,4 Chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 24.75 MB I+D on chip per chip
  Other: None
Memory: 768 GB (48 x 16 GB 2Rx4 PC4-2666V-R)
Storage: 1 x 1 TB SAS HDD, 7.2K RPM
Other: None
Software
OS: SUSE Linux Enterprise Server 12 SP2 (x86_64)
4.4.21-69-default
Compiler: C/C++: Version 18.0.0.128 of Intel C/C++
Compiler for Linux;
Fortran: Version 18.0.0.128 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: Version 3.2.0 released Sep-2017
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other: jemalloc: jemalloc memory allocator library
V5.0.1;
jemalloc: configured and built at default for
32bit (i686) and 64bit (x86_64) targets;
jemalloc: built with the RedHat Enterprise 7.4,
and the system compiler gcc 4.8.5;
jemalloc: sources avilable from jemalloc.net or
releases

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate2017_int_base 29200
SPECrate2017_int_peak 30800
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
500.perlbench_r 96 701 218 702 218 701 218 96 561 273 569 269 565 270
502.gcc_r 96 539 252 542 251 545 249 96 446 305 447 304 447 304
505.mcf_r 96 421 369 431 360 432 359 96 433 358 435 357 434 358
520.omnetpp_r 96 719 175 718 176 719 175 96 750 168 763 165 759 166
523.xalancbmk_r 96 340 298 340 298 340 298 96 283 359 283 358 282 359
525.x264_r 96 273 616 273 616 272 618 96 259 650 262 642 262 642
531.deepsjeng_r 96 429 257 431 255 428 257 96 445 247 442 249 441 250
541.leela_r 96 639 249 640 249 640 249 96 631 252 639 249 631 252
548.exchange2_r 96 443 567 442 569 441 570 96 444 567 443 567 442 569
557.xz_r 96 490 211 524 198 522 199 96 532 195 530 196 531 195

Submit Notes

 The taskset mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate taskset commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64"

 Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.4
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
CPU performance set to Enterprise
Power Performance Tuning set to OS
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f
 running on linux-0vth Sat Nov 25 09:21:26 2017

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6136 CPU @ 3.00GHz
       4  "physical id"s (chips)
       96 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 12
       siblings  : 24
       physical 0: cores 0 3 4 5 6 7 16 18 19 20 21 22
       physical 1: cores 0 1 2 3 4 8 9 11 17 18 19 20
       physical 2: cores 0 1 2 3 4 8 9 11 17 18 19 20
       physical 3: cores 0 1 2 3 4 9 10 16 18 19 25 26

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                96
      On-line CPU(s) list:   0-95
      Thread(s) per core:    2
      Core(s) per socket:    12
      Socket(s):             4
      NUMA node(s):          4
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Gold 6136 CPU @ 3.00GHz
      Stepping:              4
      CPU MHz:               1971.340
      CPU max MHz:           3700.0000
      CPU min MHz:           1200.0000
      BogoMIPS:              5985.93
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              25344K
      NUMA node0 CPU(s):     0-11,48-59
      NUMA node1 CPU(s):     12-23,60-71
      NUMA node2 CPU(s):     24-35,72-83
      NUMA node3 CPU(s):     36-47,84-95
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm hwp
      hwp_act_window hwp_epp hwp_pkg_req intel_pt tpr_shadow vnmi flexpriority ept vpid
      fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f
      avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec
      xgetbv1 cqm_llc cqm_occup_llc

 /proc/cpuinfo cache data
    cache size : 25344 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 4 nodes (0-3)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 48 49 50 51 52 53 54 55 56 57 58 59
   node 0 size: 191928 MB
   node 0 free: 186943 MB
   node 1 cpus: 12 13 14 15 16 17 18 19 20 21 22 23 60 61 62 63 64 65 66 67 68 69 70 71
   node 1 size: 193521 MB
   node 1 free: 188681 MB
   node 2 cpus: 24 25 26 27 28 29 30 31 32 33 34 35 72 73 74 75 76 77 78 79 80 81 82 83
   node 2 size: 193521 MB
   node 2 free: 188537 MB
   node 3 cpus: 36 37 38 39 40 41 42 43 44 45 46 47 84 85 86 87 88 89 90 91 92 93 94 95
   node 3 size: 193518 MB
   node 3 free: 188342 MB
   node distances:
   node   0   1   2   3
     0:  10  21  21  21
     1:  21  10  21  21
     2:  21  21  10  21
     3:  21  21  21  10

 From /proc/meminfo
    MemTotal:       791029276 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 2
       # This file is deprecated and will be removed in a future service pack or release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP2"
       VERSION_ID="12.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp2"

 uname -a:
    Linux linux-0vth 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67)
    x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Dec 31 20:14

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda1      xfs   280G   87G  194G  31% /

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS Cisco Systems, Inc. B480M5.3.2.0.176.0425171408 04/25/2017
   Memory:
    48x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
 CC  500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak)
      525.x264_r(base, peak) 557.xz_r(base, peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   500.perlbench_r(peak) 502.gcc_r(peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base)
      541.leela_r(base)
------------------------------------------------------------------------------
icpc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak)
     541.leela_r(peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  548.exchange2_r(base, peak)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.0 20170811
Copyright (C) 1985-2017 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Fortran benchmarks:

 ifort 

Base Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -DSPEC_LP64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -DSPEC_LP64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

C++ benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Fortran benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -align array32byte   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Base Other Flags

C benchmarks:

 -m64   -std=c11 

C++ benchmarks:

 -m64 

Fortran benchmarks:

 -m64 

Peak Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Fortran benchmarks:

 ifort 

Peak Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -D_FILE_OFFSET_BITS=64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -D_FILE_OFFSET_BITS=64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Peak Optimization Flags

C benchmarks:

500.perlbench_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-strict-overflow   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
502.gcc_r:  -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32   -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
505.mcf_r:  -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
525.x264_r:  -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-alias   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
557.xz_r:  Same as 505.mcf_r 

C++ benchmarks:

520.omnetpp_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
523.xalancbmk_r:  -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32   -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
531.deepsjeng_r:  Same as 520.omnetpp_r 
541.leela_r:  Same as 520.omnetpp_r 

Fortran benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -align array32byte   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Peak Other Flags

C benchmarks (except as noted below):

 -m64   -std=c11 
502.gcc_r:  -m32   -std=c11 

C++ benchmarks (except as noted below):

 -m64 
523.xalancbmk_r:  -m32 

Fortran benchmarks:

 -m64 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml.