CPU2017 Flag Description
NEC Corporation Express5800/A2040e (2.10 GHz, Intel Xeon Platinum 8160)

Copyright © 2016 Intel Corporation. All Rights Reserved.


Base Compiler Invocation

C benchmarks

C++ benchmarks

Fortran benchmarks


Peak Compiler Invocation

C benchmarks

C++ benchmarks

Fortran benchmarks


Base Portability Flags

500.perlbench_r

502.gcc_r

505.mcf_r

520.omnetpp_r

523.xalancbmk_r

525.x264_r

531.deepsjeng_r

541.leela_r

548.exchange2_r

557.xz_r


Peak Portability Flags

500.perlbench_r

502.gcc_r

505.mcf_r

520.omnetpp_r

523.xalancbmk_r

525.x264_r

531.deepsjeng_r

541.leela_r

548.exchange2_r

557.xz_r


Base Optimization Flags

C benchmarks

C++ benchmarks

Fortran benchmarks


Peak Optimization Flags

C benchmarks

500.perlbench_r

502.gcc_r

505.mcf_r

525.x264_r

557.xz_r

C++ benchmarks

520.omnetpp_r

523.xalancbmk_r

531.deepsjeng_r

541.leela_r

Fortran benchmarks

548.exchange2_r


Base Other Flags

C benchmarks

C++ benchmarks

Fortran benchmarks


Peak Other Flags

C benchmarks (except as noted below)

502.gcc_r

C++ benchmarks (except as noted below)

523.xalancbmk_r

Fortran benchmarks


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY
Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
    granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
    compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
    scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.

Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.

Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.

Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Firmware / BIOS / Microcode Settings

Memory RAS Mode:
This server has "SDDC Mode","ADDDC Mode", "Spare Mode", "Full Mirror Mode", "Addr Mirror Mode", "Reliable Memory Mode", and "Memory Scrubbing Function" as memory RAS functions.
VT-x:
Set Enable/Disable of Intel (R) VT-x which is the processor virtualization support HW function of Intel. This setting item is displayed only when the processor supporting this function is displayed. You can not change the setting when Intel TXT Support is set to [Enabled]. Disabled: Disables the function. Enabled : Enables the function
Processor C6 Report:
Set Enable/Disable of the C6 State transition function by OS. Disabled: Disables the function. Enabled: Transition to C6 State (Deep Power Down: Stop power supply to other than SRAM), depending on the load condition of the processor, to reduce energy consumption while maintaining optimum performance.
DCU Streamer Prefetch:
Set [enable / disable] of DCU Stremer prefetcher of processor. Disabled: Disables the function. Enabled: Analyzes the cache access pattern and prefetches the most relevant data in the L1 cache. As a result, performance may be improved.
OS Performance Tuning:
Set whether or not to allow Performance Tuning by OS. Disabled: Disables the function. Enabled : Enables the function
Energy Performance:
Set the operation of the processor to performance priority or power saving priority. This item is displayed only when 'OS Performance Tuning' is set to Disabled.
Dead Line LLC Allocation:
Set Enable/Disable for MLC to LLC movement. Disabled: Disables the function. Enabled : Enables the function
Patrol Scrub:
Activate the patrol scrubbing function. Disabled: Disables the function. Enable: Memory is accessed periodically, and when a correctable fault is detected, the memory is restored to the error-free state by writing the corrected data back to the memory.
Memory P.E. Retry:
Set [Enable / Disable] for DDR4 CMD / ADDR Parity Error Retry function. Disabled: Disables the function. Enabled: Performs a retry process when CMD/ADDR Parity Error is detected during memory access. Although this can reduce the occurrence of DRAM failure, the memory access performance may be degraded.
Sub NUMA Clustering (SNC):
SNC breaks up the last level cache (LLC) into disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. SNC improves average latency to the LLC and memory. SNC is a replacement for the cluster on die (COD) feature found in previous processor families. For a multi-socketed system, all SNC clusters are mapped to unique NUMA domains. Set Enable/Disable of Sub NUMA Clustering function. This item is displayed only when a processor supporting this function is installed. Disabled: Disables the function. Enabled : Enables the function

Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-10-19.html,
http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-SPECcpu2017-Flags-V1.2-SKL-A2040e-RevA.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-10-19.xml,
http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-SPECcpu2017-Flags-V1.2-SKL-A2040e-RevA.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2018 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.0.2.
Report generated on 2018-10-31 19:02:18 by SPEC CPU2017 flags formatter v5178.