CPU2017 Flag Description
Supermicro A+ Server 2124BT-HTR (H12DST-B , AMD EPYC 7262)

Compilers: AMD Optimizing C/C++ Compiler Suite


Base Compiler Invocation

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Peak Compiler Invocation

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Base Portability Flags

603.bwaves_s

607.cactuBSSN_s

619.lbm_s

621.wrf_s

627.cam4_s

628.pop2_s

638.imagick_s

644.nab_s

649.fotonik3d_s

654.roms_s


Peak Portability Flags

603.bwaves_s

607.cactuBSSN_s

619.lbm_s

621.wrf_s

627.cam4_s

628.pop2_s

638.imagick_s

644.nab_s

649.fotonik3d_s

654.roms_s


Base Optimization Flags

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Peak Optimization Flags

C benchmarks

619.lbm_s

638.imagick_s

644.nab_s

Fortran benchmarks

603.bwaves_s

649.fotonik3d_s

654.roms_s

Benchmarks using both Fortran and C

621.wrf_s

627.cam4_s

628.pop2_s

Benchmarks using Fortran, C, and C++

607.cactuBSSN_s


Base Other Flags

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Peak Other Flags

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

Using numactl to bind processes and memory to cores

For multi-copy runs or single copy runs on systems with multiple sockets, it is advantageous to bind a process to a particular core. Otherwise, the OS may arbitrarily move your process from one core to another. This can affect performance. To help, SPEC allows the use of a "submit" command where users can specify a utility to use to bind processes. We have found the utility 'numactl' to be the best choice.

numactl runs processes with a specific NUMA scheduling or memory placement policy. The policy is set for a command and inherited by all of its children. The numactl flag "--physcpubind" specifies which core(s) to bind the process. "-l" instructs numactl to keep a process's memory on the local node while "-m" specifies which node(s) to place a process's memory. For full details on using numactl, please refer to your Linux documentation, 'man numactl'

Note that some older versions of numactl incorrectly interpret application arguments as its own. For example, with the command "numactl --physcpubind=0 -l a.out -m a", numactl will interpret a.out's "-m" option as its own "-m" option. To work around this problem, we put the command to be run in a shell script and then run the shell script using numactl. For example: "echo 'a.out -m a' > run.sh ; numactl --physcpubind=0 bash run.sh"


Shell, Environment, and Other Software Settings

Transparent Huge Pages (THP)

THP is an abstraction layer that automates most aspects of creating, managing, and using huge pages. THP is designed to hide much of the complexity in using huge pages from system administrators and developers, as normal huge pages must be assigned at boot time, can be difficult to manage manually, and often require significant changes to code in order to be used effectively. Most recent Linux OS releases have THP enabled by default.

Linux Huge Page settings

If you need finer control you can manually set huge pages using the following steps:

Note that further information about huge pages may be found in the Linux kernel documentation file hugetlbpage.txt.

ulimit -s <n>

Sets the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.

ulimit -l <n>

Sets the maximum size of memory that may be locked into physical memory.

powersave -f (on SuSE)

Makes the powersave daemon set the CPUs to the highest supported frequency.

/etc/init.d/cpuspeed stop (on Red Hat)

Disables the cpu frequency scaling program in order to set the CPUs to the highest supported frequency.

LD_LIBRARY_PATH

An environment variable that indicates the location in the filesystem of bundled libraries to use when running the benchmark binaries.

kernel/randomize_va_space

This option can be used to select the type of process address space randomization that is used in the system, for architectures that support this feature.

MALLOC_CONF

An environment variable set to tune the jemalloc allocation strategy during the execution of the binaries. This environment variable setting is not needed when building the binaries on the system under test.


Firmware / BIOS / Microcode Settings

Determinism Control:
This BIOS option allows for choose AGESA determinism control. AGESA is an acronym for "AMD Generic Encapsulated Software Architecture." AGESA is a bootstrap protocol by which system devices on AMD64-architecture mainboards are initialized, it responsible for the initialization of the processor cores, memory, and the HyperTransport controller. Available settings are:
Determinism Slider:
This BIOS option allows for Enable/Disable AGESA determinism to control performance. AGESA is an acronym for "AMD Generic Encapsulated Software Architecture." AGESA is a bootstrap protocol by which system devices on AMD64-architecture mainboards are initialized, it responsible for the initialization of the processor cores, memory, and the HyperTransport controller. Available settings are:
cTDP Control:
This BIOS option is for "Configurable TDP (cTDP)", it allows user can set customized value for TDP. Available settings are:
cTDP:
TDP is an acronym for “Thermal Design Power.” TDP is the recommended target for power used when designing the cooling capacity for a server. EPYC processors are able to control this target power consumption within certain limits. This capability is referred to as “configurable TDP” or "cTDP." cTDP can be used to reduce power consumption for greater efficiency, or in some cases, increase power consumption above the default value to provide additional performance. cTDP is controlled using a BIOS option.

The default EPYC cTDP value corresponds with the microprocessor’s nominal TDP. For the EPYC 7702, the default value is 200W. The default cTDP value is set at a good balance between performance and energy efficiency. The EPYC 7702 cTDP can be reduced as low as 180W, which will minimize the power consumption for the processor under load, but at the expense of peak performance. Increasing the EPYC 7742 cTDP to 240W will maximize peak performance by allowing the CPU to maintain higher dynamic clock speeds, but will make the microprocessor less energy efficient. Note that at maximum cTDP, the CPU thermal solution must be capable of dissipating at least 240W or the EPYC 7742 processor might engage in thermal throttling under load.

The available cTDP ranges for each EPYC model are in the table below:
ModelNominal TDP Minimum cTDP Maximum cTDP**
EPYC 7742225W 225W 240W
EPYC 7702200W 165W 200W
EPYC 7702P200W 165W 200W
EPYC 7552200W 165W 200W
EPYC 7542225W 225W 240W
EPYC 7502180W 165W 200W
EPYC 7502P180W 165W 200W
EPYC 7452155W 155W 180W
EPYC 7402180W 165W 200W
EPYC 7402P180W 165W 200W
EPYC 7352155W 155W 180W
EPYC 7302155W 155W 180W
EPYC 7302P155W 155W 180W
EPYC 7262155W 155W 180W
EPYC 7601180W 165W 200W
EPYC 7551180W 165W 200W
EPYC 7501155/170W 135W 155/170W*
EPYC 7451180W 165W 200W
EPYC 7401155/170W 135W 155/170W*
EPYC 7351155/170W 135W 155/170W*
EPYC 7301155/170W 135W 155/170W*
EPYC 7281155/170W 135W 155/170W*
EPYC 7251120W 105W 120W
*Max TDP is 170W when DDR4 is operating at 2667 MT/sec, or 155W when DDR4 is operating at lower frequencies.
** cTDP must remain below the thermal solution design parameters or thermal throttling could be frequently encountered.
IOMMU:
The I/O Memory Management Unit (IOMMU) extends the AMD64 system architecture by adding support for address translation and system memory access protection on DMA transfers from periph-eral devices. IOMMU also helps filter and remap interrupts from peripheral devices. Available settings are:
Package Power Limit Control:
This is a per processor Package Power Limit (PPT) value applicable for all populated processors in the system. This can be set to limit the PPT to a certain value. Available settings are:
Package Power Limit:
Set customize processor Package Power Limit (PPT) value to be used on all populated processors in the system. If set to 240 = Use the 240W PPT ***PPT will be used as the ASIC power limit***
APBDIS:
APBDis is an IO Boost disable on uncore. For any system user that needs to block these uncore optimizations that are impacting base core clock speed, we are exposing a method to disable this behavior called APBDis. This locks the fabric clock to the non-boosted speeds. Available settings are:
NUMA Nodes Per Socket:
Specifies the number of desired NUMA nodes per socket. This option allows the user to divide the memory that each socket has into a certain number of NUMA memory nodes for optimal memory bandwidth. Available settings are:

Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/aocc200-flags-B1.html,
http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-Rome-revB.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/aocc200-flags-B1.xml,
http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-Rome-revB.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2020 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.1.0.
Report generated on 2020-03-17 16:18:54 by SPEC CPU2017 flags formatter v5178.