CPU2017 Flag Description
Lenovo Global Technology ThinkSystem ST650 V2 (2.10 GHz, Intel Xeon Gold 5318Y)

Copyright © 2016 Intel Corporation. All Rights Reserved.


Base Compiler Invocation

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Base Portability Flags

603.bwaves_s

607.cactuBSSN_s

619.lbm_s

621.wrf_s

627.cam4_s

628.pop2_s

638.imagick_s

644.nab_s

649.fotonik3d_s

654.roms_s


Base Optimization Flags

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY
Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
    granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
    compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
    scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.

Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.

Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.

Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Operating System Tuning Parameters

sched_cfs_bandwidth_slice_us
This OS setting controls the amount of run-time(bandwidth) transferred to a run queue from the task's control group bandwidth pool. Small values allow the global bandwidth to be shared in a fine-grained manner among tasks, larger values reduce transfer overhead. The default value is 5000 (ns).
sched_latency_ns
This OS setting configures targeted preemption latency for CPU bound tasks. The default value is 24000000 (ns).
sched_migration_cost_ns
Amount of time after the last execution that a task is considered to be "cache hot" in migration decisions. A "hot" task is less likely to be migrated to another CPU, so increasing this variable reduces task migrations. The default value is 500000 (ns).
sched_min_granularity_ns
This OS setting controls the minimal preemption granularity for CPU bound tasks. As the number of runnable tasks increases, CFS(Complete Fair Scheduler), the scheduler of the Linux kernel, decreases the timeslices of tasks. If the number of runnable tasks exceeds sched_latency_ns/sched_min_granularity_ns, the timeslice becomes number_of_running_tasks * sched_min_granularity_ns. The default value is 8000000 (ns).
sched_wakeup_granularity_ns
This OS setting controls the wake-up preemption granularity. Increasing this variable reduces wake-up preemption, reducing disturbance of compute bound tasks. Lowering it improves wake-up latency and throughput for latency critical tasks, particularly when a short duty cycle load component must compete with CPU bound components. The default value is 10000000 (ns).
numa_balancing
This OS setting controls automatic NUMA balancing on memory mapping and process placement. NUMA balancing incurs overhead for no benefit on workloads that are already bound to NUMA nodes. Possible settings: For more information see the numa_balancing entry in the Linux sysctl documentation.
Transparent Hugepages (THP)
THP is an abstraction layer that automates most aspects of creating, managing, and using huge pages. It is designed to hide much of the complexity in using huge pages from system administrators and developers. Huge pages increase the memory page size from 4 kilobytes to 2 megabytes. This provides significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead. Most recent Linux OS releases have THP enabled by default.
THP usage is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/enabled. Possible values: THP creation is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/defrag. Possible values: An application that "always" requests THP often can benefit from waiting for an allocation until those huge pages can be assembled.
For more information see the Linux transparent hugepage documentation.
cpupower
The OS 'cpupower' utility is used to change CPU power governors settings. Available settings are:
tuned-adm
The tuned-adm tool is a commandline interface for switching between different tuning profiles available to the tuned tuning daemon available in supported Linux distros. The default configuration file is located in /etc/tuned.conf and the supported profiles can be found in /etc/tune-profiles. Some profiles that may be available by default include: default, desktop-powersave, server-powersave, laptop-ac-powersave, laptop-battery-powersave, spindown-disk, throughput-performance, latency-performance, enterprise-storage. To set a profile, one can issue the command "tuned-adm profile (profile_name)". Here are details about relevant profiles:
dirty_background_ratio
Set through "echo 40 > /proc/sys/vm/dirty_background_ratio". This setting can help Linux disk caching and performance by setting the percentage of system memory that can be filled with dirty pages.
dirty_ratio
Set through "echo 8 > /proc/sys/vm/dirty_ratio". This setting is the absolute maximum amount of system memory that can be filled with dirty pages before everything must get committed to disk.
ksm/sleep_millisecs
Set through "echo 200 > /sys/kernel/mm/ksm/sleep_millisecs". This setting controls how many milliseconds the ksmd (KSM daemon) should sleep before the next scan.
swappiness
The swappiness value can range from 1 to 100. A value of 100 will cause the kernel to swap out inactive processes frequently in favor of file system performance, resulting in large disk cache sizes. A value of 1 tells the kernel to only swap processes to disk if absolutely necessary. This can be set through a command like "echo 1 > /proc/sys/vm/swappiness"
Zone Reclaim Mode
Zone reclaim allows the reclaiming of pages from a zone if the number of free pages falls below a watermark even if other zones still have enough pages available. Reclaiming a page can be more beneficial than taking the performance penalties that are associated with allocating a page on a remote zone, especially for NUMA machines. To tell the kernel to free local node memory rather than grabbing free memory from remote nodes, use a command like "echo 1 > /proc/sys/vm/zone_reclaim_mode"
Free the file system page cache
The command "echo 3> /proc/sys/vm/drop_caches" is used to free pagecache, dentries and inodes.

Firmware / BIOS / Microcode Settings

Choose Operating Mode: (Default="Efficiency -Favor Performance")
The average customer doesn't know the best way to set each individual power/performance feature for their specific environment. Because of this, a menu option is provided that can help a customer optimize the system for things such as minimum power usage/acoustic levels, maximum efficiency, Energy Star optimization, or maximum performance.
Page Policy:
Adaptive Open Page Policy can improve performance for applications with a highly localized memory access pattern; Closed Page Policy can benifit applications that access memory more randomly. Default is Adaptive.
CPU P-state Control:
Select the method used to control CPU P-states (performance states). "None" disables all P-states and the CPUs run at either their rated frequency or in turbo mode (if turbo is enabled). When "Legacy" is selected, the CPU P-states will be presented to the operating system (OS) and the OS power management (OSPM) will directly control which P-state is selected. With "Autonomous", the P-states are controlled fully by system hardware. No P-state support is required in the OS or VM. "Cooperative" is a combination of Legacy and Autonomous. The P-states are still controlled in hardware but the OS can provide hints to the hardware for P-state limits and the desired setting. With "Cooperative without Legacy", uses Intel native hardware p-states without Legacy p-state control (No OS controlled p-states). Starts with Autonomous mode until the OS swtiches to Cooperative. With "Cooperative with Legacy", uses Intel native hardware p-states but Legacy p-state control. Starts with Legacy p-states until the OS swtiches to Cooperative. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose "Custom Mode" in "Operating Mode" located under "System Setting" submenu. Default is Autonomous.
C-States:
C-states reduce CPU idle power. There are three options in this mode: Legacy, Autonomous, Disabled. Default is Autonomous.
C1 Enhanced Mode:
Enabling C1E (C1 enhanced) state can save power by halting CPU cores that are idle. Default is Enabled.
Turbo Mode:
Enabling turbo mode can boost the overall CPU performance when all CPU cores are not being fully utilized. A CPU core can run above its rated frequency for a short perios of time when it is in turbo mode. When a preset mode is selected, the low-level settings are not changeable and will grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Settings" submenu. Default is Enabled.
Hyper-Threading:
Enabling Hyper-Threading let operating system addresses two virtual or logical cores for a physical presented core. Workloads can be shared between virtual or logical cores when possible. The main function of hyper-threading is to increase the number of independent instructions in the pipeline for using the processor resources more efficiently. Default is Enabled.
DCA:
DCA capable I/O devices such as network controllers can place data directly into the CPU cache, which improves response time. Default is Enabled.
Power/Performance Bias:
Power/Performance bias determines how aggressively the CPU will be power managed and placed into turbo. With "Platform Controlled", the system controls the setting. Selecting "OS Controlled" allows the operating system to control it. Default is Platform Controlled.
CPU Frequency Limits:
When the CPU Frequency Limit parameter is set to the Restrict Maximum Frequency setting, the maximum frequency (turbo, AVX, and non turbo) can be restricted to a frequency that is between the maximum turbo frequency for the CPU installed and 1.2GHz in 100MHz increments. This can be useful for synchronizing CPU task. Note, the max frequency for N+1 cores cannot be higher than N cores. If an illegal frequency is entered, it will automatically be limited to a legal value. If the CPU frequency limits are being controlled through application software, leave this menu item at the default ([Full turbo uplift]), please choose [Custom Mode] in "Operating Mode" and [Enable] in "Turbo Mode" located under "System Setting" submenu. Default is Full turbo uplift. Details see page 20-21 in https://lenovopress.com/lp1477.pdf.
Uncore Frequency Scaling:
When enabled, the CPU uncore will dynamically change speed based on the workload. All miscellaneous logic inside the CPU package is considered the uncore. Default is Enabled.
MONITOR/MWAIT:
MONITOR/MWAIT instructions are used to engage C-states. MONITOR/MWAIT OS instructions are used to enable/disable c-states. If a user disables c-states in UEFI and wants to prevent the OS from overriding that setting, the user should set MONITOR/MWAIT=Disabled. Default is Enabled.
Sub-NUMA Cluster (SNC):
SNC breaks up the last level cache (LLC) into disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. SNC improves average latency to the LLC and memory. SNC is a replacement for the cluster on die (COD) feature found in previous processor families. For a multi-socketed system, all SNC clusters are mapped to unique NUMA domains. (See also IMC interleaving.) Values for this BIOS option can be: Default is Disabled.
Snoop Preference:
Select the appropriate snoop mode based on the workload. There are two snoop modes: "Home Snoop Plus" and "Home Snoop". Default is "Home Snoop Plus".
XPT Prefetcher
When enabled, enables a read request that is sent to the processor last level cache to speculatively issue a copy of that read request to the processor memory controller prefetcher to reduce latency. The performance benefit can vary so the end user must determine whether or not enabling the XPT prefetcher benefits their specific application environment. Default is Enabled.
UPI Prefetcher
When enabled, memory reads on the memory bus can be started earlier by the processor memory controller to reduce latency. The performance benefit can vary so the end user must determine whether or not enabling the UPI prefetcher benefits their specific application environment. Default is Enabled.
Patrol Scrub:
Patrol Scrub is a memory RAS feature which runs a background memory scrub against all DIMMs. Can negatively impact performance. Default is Enabled.
DCU Streamer Prefetcher:
DCU (Level 1 Data Cache) streamer prefetcher is an L1 data cache prefetcher. Lightly threaded applications and some benchmarks can benefit from having the DCU streamer prefetcher enabled. Default setting is Enabled.
Stale AtoS
The in-memory directory has three states: invalid (I), snoopAll (A), and shared (S). Invalid (I) state means the data is clean and does not exist in any other socket`s cache. The snoopAll (A) state means the data may exist in another socket in exclusive or modified state. Shared (S) state means the data is clean and may be shared across one or more socket`s caches. When doing a read to memory, if the directory line is in the A state we must snoop all the other sockets because another socket may have the line in modified state. If this is the case, the snoop will return the modified data. However, it may be the case that a line is read in A state and all the snoops come back a miss. This can happen if another socket read the line earlier and then silently dropped it from its cache without modifying it. Values for this BIOS option can be: Stale AtoS may be beneficial in a workload where there are many cross-socket reads. Default is Auto.
LLC dead line alloc
In some Intel CPU caching schemes, mid-level cache (MLC) evictions are filled into the last level cache (LLC). If a line is evicted from the MLC to the LLC, the core can flag the evicted MLC lines as "dead." This means that the lines are not likely to be read again. This option allows dead lines to be dropped and never fill the LLC if the option is disabled. Values for this BIOS option can be: Default is Enable.
Adjacent Cache Prefetch:
When enabled, fetches both cache lines that make up a 128 byte cache line pair even if the requested data is only in the first cache line. Lightly threaded applications and some benchmarks can benefit from having the adjcent cache line prefetch enabled. Default is Enabled.
Intel Virtualization Technology:
Intel Virtualization Technology allows a platform to run multiple operating systems and applications in independent partitions, so that one computer system can function as multiple virtual system. Default is Enabled.
Hardware Prefetcher:
When enabled, fetches the next cache line into the processor L2 cache if two consecutive cache lines were read. The next cache line is fetched from memory. Lightly threaded applications can benefit from having the hardware prefetcher enabled. But, the end user must determine whether or not enabling the hardware prefetcher benefits their specific application environment. Default is Enabled.
DCU IP Prefetcher:
DCU IP Prefetcher is typically best left enabled for most environments. Some environments may benefit from having it disabled(e.g. Java). Default is Enabled.
Workload Configuration:
I/O sensitive should be used with expansion cards that require high I/O bandwidth when the CPU cores are idle to allow enough frequency for the workload. Default is Balanced.
Memory Power Management:
Allows the platform to put the memory into a lower power consumption state. Performance may be reduced. [Disabled] provides maximum performance but minimum power savings. [Automatic] is suitable for most applications. When a preset mode is selected, the low-level settings are not changeable and will grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Settings" submenu. Default is Disabled.
Memory Data Scrambling:
Uses a data scrambling feature in the memory controller to create pseudo-random patterns on the DDR4 data bus to reduce possibility of data-bit errors due to the impact of excessive current fluctuations.Default is Enabled.
UPI Link Disable:
Disabling one of the CPU UPI links can save power. If maximum performance is desired, all UPI links should be left enabled. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu. Note, for some highly NUMA optimized workoads, maximum performance may be achieved by setting 'Disabled 1 Link'. Default is Enabled ALL Links.
LLC Prefetch:
The LLC prefetcher is a new prefetcher added to the Intel Xeon Scalable family as a result of the non-inclusive cache architecture. Enabling LLC Prefetch gives the core prefetcher the ability to prefetch data directly into the LLC without necessarily filling into the MLC. Default is Disable.

Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-ICElake-F.html,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-ICElake-F.xml,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2021 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.1.8.
Report generated on 2021-08-19 10:54:47 by SPEC CPU2017 flags formatter v5178.