![[user]](https://www.spec.org/auto/cpu2017/images/user.png)
Bisheng C compiler.
Bisheng C++ compiler.
Bisheng Fortran compiler.
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This macro indicates that the benchmark is being compiled on an ARM system running the Linux operating system in the AArch64 execution environment.
This macro specifies that the target system uses the LP64 data model; specifically, that integers are 32 bits, while longs and pointers are 64 bits.
![[suite]](https://www.spec.org/auto/cpu2017/images/suite.png)
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This flag can be set for SPEC compilation for LINUX using default compiler.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
This option is used to indicate that the host system's integers are 32-bits wide, and longs and pointers are 64-bits wide. Not all benchmarks recognize this macro, but the preferred practice for data model selection applies the flags to all benchmarks; this flag description is a placeholder for those benchmarks that do not recognize this macro.
Generate output files in LLVM bitcode format, suitable for link time optimization.
-Wl passes the named option to the linker.
Request creation of ".note.gnu.build-id" ELF note section.
Allows links to proceed even if there are multiple definitions of some symbols.
-Wl,-mllvm passes the named option to the linker, which in turn will pass it to LLVM.
When the flag is disable,the loop invariant instructions will be seen as safe to hoist, and be hoisted to preheader without cost considered. When flag is enable, hoist will be executed only when invariant instruction is guaranteed to be executed.
Enable optimization that hoists expressions from branches to a common dominator, using GVN (global value numbering) to discover expressions computing the same values.
Enable wide load on certain loops with conditional breaks.
Determine whether to apply the loop branch heuristic optimization without checks or apply it only when the loop count is large enough and the loop contains float point operators.
Enable NEON vector multiplication simplification.
Enable padding of structures shortened by pointer compression.
Enable repacking of structure elements.
Use the jemalloc library.
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in an attempt to make the program run faster).
Specify the name of the target processor.
-mllvm passes the named option to LLVM.
Enable the LoopInterchange Pass.
Prohibit the compiler to assume the strictest aliasing rules applicable to the language being compiled.
Use the mathlib library.
Specify the language standard to compile for.
Generate output files in LLVM bitcode format, suitable for link time optimization.
-Wl passes the named option to the linker.
Request creation of ".note.gnu.build-id" ELF note section.
-Wl,-mllvm passes the named option to the linker, which in turn will pass it to LLVM.
When the flag is disable,the loop invariant instructions will be seen as safe to hoist, and be hoisted to preheader without cost considered. When flag is enable, hoist will be executed only when invariant instruction is guaranteed to be executed.
Use the jemalloc library.
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in an attempt to make the program run faster).
Specify the name of the target processor.
-mllvm passes the named option to LLVM.
Enable the LoopInterchange Pass.
Use the mathlib library.
Select Fortran 95/03 semantics for assignments to allocatable objects.
Generate output files in LLVM bitcode format, suitable for link time optimization.
-Wl passes the named option to the linker.
Request creation of ".note.gnu.build-id" ELF note section.
-Wl,-mllvm passes the named option to the linker, which in turn will pass it to LLVM.
Enable branch probability enhancement for large loops with small trip counts.
Use the jemalloc library.
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in an attempt to make the program run faster).
Specify the name of the target processor.
Instructs the compiler to conform to the IEEE-754 specifications.
-mllvm passes the named option to LLVM.
Enable the LoopInterchange Pass.
Use the mathlib library.
Show commands to run and use verbose output.
Tells the compiler to use a different linker instead of the default linker (ld).
Show commands to run and use verbose output.
Tells the compiler to use a different linker instead of the default linker (ld).
Show commands to run and use verbose output.
Tells the compiler to use a different linker instead of the default linker (ld).
Using numactl to bind processes and memory to cores
ulimit -s <n>
Sets the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.
Select only test related files when installing the operating system,So that many services are not installed, this will reduce the consumption of resources by the operating system itself. In accordance with the following methods to install the operating system: 1.The software installation mode was selected 'Customize now'. 2.Next,In 'base System' column, We choose the following installation package,'Base','Compatibility Libraries', 'Java Platform','Large Systems Performance','Performance Tools','Perl Support'.In 'Development' column, We choose the following installation package,'Development tools'.That is all the installation package.
"cpupower frequency-set" provides a simplified mechanism to adjust processor frequencies when cpu frequency scaling is enabled in the OS. See the cpupower-frequency-set man page for details.Here is a brief description of options used in the config file. By default, settings are applied to all logical cpus in the system.Frequencies can be passed in Hz, kHz (default), MHz, GHz, or THz by postfixing the value with the desired unit name, without any space. Available frequencies and governors can be determined with "cpupower frequency-info".
Tmpfs is a file system which keeps all files in virtual memory.A tmpfs file system will go to swap if memory pressure demands real memory for applications. This can have a very negative effect on the I/O load and system performance
Each process is assigned a time period, known as its time slice, that is the time allowed to run the process. Increse the process time slice can have a positive effect on the calculated sensitivity task. The related kernel parameters are sched_wakeup_granularity_ns, sched_min_granularity_ns, etc.
Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
On RedHat EL6 and later, Transparent Hugepages are used by default if /sys/kernel/mm/transparent_hugepage/enabled is set to always. The default value is always.
On SUSE SLES11 and later, Transparent Hugepages are used by default if /sys/kernel/mm/transparent_hugepage/enabled is set to always. The default value is always.
nohz_full: This kernel option sets adaptive tick mode (NOHZ_FULL) to specified porcessors. Since the number of interrupts is reduced to ones per second, latency-sensitive applications can take advantage of it.
This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.
This BIOS option specifies the memory refresh rate.
Values for this BIOS setting can be:
32ms: specifies the memory refresh rate to 32ms.
64ms: specifies the memory refresh rate to 64ms.
Auto: specifies the memory refresh rate to Auto.Server will changes the memory refresh rate along the temperature of the memory.
Values for this BIOS setting can be:
Efficiency: Maximize the power efficiency of the server.
Performance: Maximize the performance of the server.
The Baseboard Management Controller allows the user to adjust the fan speed manually,If the server is in a stressful environment, the CPU have high temperature, you can adjust the fan speed to 100%.
This BIOS option allows the enabling/disabling of a processor mechanism to contiol the interleaving between CPU DIE. In some cases, setting this option to Disabled may improve performance.
This BIOS option allows the enabling/disabling of a processor mechanism to contiol the interleaving between memory channels. In some cases, setting this option to Enabled may improve performance.
This BIOS option controls the cache mode setting of the controllers.
Values for this BIOS setting can be:
in: partition out: share.Set the controllers L3 cache mode. In chip is set to partitioned mode.Out of chip is set to shared mode.
in: share out: share.In chip is set to shared mode.Out of chip is set to shared mode.
in: private out: share.In chip is set to private mode.Out of chip is set to shared mode.
in: private out: private.In chip is set to private mode.Out of chip is set to private mode.
In some cases, such as the cores of cpu are 196,setting this option to "in: private out: private" may improve performance.
Share mode means the L3 cache is shared by all L2 processes, a process can use the capacity of the entire L3.
Private mode, the entire L3 is divided into N private L3s, each private L3 node only caches the data of the corresponding L2 node, that means a process can only ues part of the L3 capacity.
Partition mode, the entire L3 is divided into N private L3s, each L2 cache accesses its corresponding L3 preferentially, and it can also access the other private L3s.
"N" mentioned above is determined by the CPU cores count, every 4 cores are a cluster sharing one piece private L3 cache.
Flag description origin markings:
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Indicates that the flag description came from the user flags file. |
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Indicates that the flag description came from the suite-wide flags file. |
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Indicates that the flag description came from a per-benchmark flags file. |
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2021 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.1.8.
Report generated on 2021-11-11 11:00:06 by SPEC CPU2017 flags formatter v5178.