CPU2017 Flag Description
Fujitsu PRIMERGY TX1330 M5, Intel Xeon E-2336, 2.90GHz

Copyright © 2016 Intel Corporation. All Rights Reserved.


Base Compiler Invocation

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Base Portability Flags

603.bwaves_s

607.cactuBSSN_s

619.lbm_s

621.wrf_s

627.cam4_s

628.pop2_s

638.imagick_s

644.nab_s

649.fotonik3d_s

654.roms_s


Base Optimization Flags

C benchmarks

Fortran benchmarks

Benchmarks using both Fortran and C

Benchmarks using Fortran, C, and C++


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY
Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
    granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
    compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
    scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.

Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.

Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.

Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Operating System Tuning Parameters

sched_cfs_bandwidth_slice_us
When Completely Fair Scheduler bandwidth control is in use, this parameter controls the amount of run-time (bandwidth) transferred to a run queue from the task's control group bandwidth pool. Small values allow the global bandwidth to be shared in a fine-grained manner among tasks, larger values reduce transfer overhead.
The default value is 5000.
cpupower frequency-set
cpupower utility is a collection of tools for power efficiency of processor.frequency-set sub-command controls settings for processor frequency."-g [governor]" specifies a policy to select processor frequency.The performance governor statically sets frequency of the processor cores specified by "-c" option to the highest possible for maximum performance.
Transparent Huge Pages(THP)
THP is an abstraction layer that automates most aspects of creating, managing, and using huge pages. THP is designed to hide much of the complexity in using huge pages from system administrators and developers, as normal huge pages must be assigned at boot time, can be difficult to manage manually, and often require significant changes to code in order to be used effectively. Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead. Most recent Linux OS releases have THP enabled by default.
The default value is "always".

Firmware / BIOS / Microcode Settings

Adjacent Cache Line Prefetch
This BIOS option allows 2 options: "Enabled" and "Disabled".
This prefetcher always collects cache line pairs (128 bytes) from the main memory, providing that the data is not already contained in the cache. If this prefetcher is disabled, only one cache line (64 bytes) is collected, which contains the data required by the processor.
Default setting is "Enabled".
AES
This BIOS option allows 2 options: "Enabled" and "Disabled".
This option enables or disables Advanced Encryption Standard (AES) feature. This feature speeds up the process of encrypting information that usess AES.
Default setting is "Enabled".
C-States
This BIOS switch allows 2 options: "Enabled" and "Disabled".
This feature enables or disables CPU Power Management feature. This switch allows CPU to go to C-States when it's not 100% ulilized. If this option is disabled, all C-State related features are disabled.
Default setting is "Enabled".
C-States Auto Demotion
This BIOS switch allows 2 options: "C1" and "Disabled".
Configure C-State Auto Demotion.
Default setting is "C1".
C-States Un Demotion
This BIOS switch allows 2 options: "C1" and "Disabled".
Configure C-State Un-Demotion.
Default setting is "C1".
C-State Pre-Wake
This BIOS switch allows 2 options: "Enabled" and "Disabled".
This feature enables or disables core/package early wake function from deep C-States using core/package C-State Pre-Wake timers.
Default setting is "Enabled".
DCU Streamer Prefetcher
This BIOS switch allows 2 options: "Enabled" and "Disabled".
This prefetcher is a L1 data cache prefetcher, which detects multiple loads from the same cache line done within a time limit, in order to then prefetch the next line from the L2 cache or the main memory into the L1 cache based on the assumption that the next cache line will also be needed.
Default setting is "Enabled".
DDR Speed Control
This BIOS switch allows 2 options: "Manual" and "Auto".
DDR Frequency and Gear1/Gear2 control for all SAGV points.
Default setting is "Manual".
DDR PowerDown and idle counter
This BIOS switch allows 2 options: "BIOS" and "PCODE".
This feature determines whether BIOS or hardware will control DDR powerdown modes and idle counter. When "PCODE" is selected, hardware algorithm controls the modes. When "BIOS" is selected BIOS controls the modes.
Default setting is "BIOS".
DMI Gen3 ASPM
This BIOS option allows 5 options: "Disabled", "Auto", "ASPM L0s", "ASPM L1" and "ASPM L0sL1".
DMI Gen3 ASPM Support.
Default setting is "Auto".
DMI Link ASPM Control
This BIOS option allows 4 options: "Disabled", "L0s", "L1" and "L0sL1".
The control of Active State Power Management(ASPM) supported on the Direct Media Interface(DMI) Link. L0s: L0s entry supported. L1: L1 entry supported. L0sL1: L0s and L1 entry supported. Disabled: No ASPM entry supported.
Default setting is "L1".
Energy Efficient Turbo
This BIOS option allows 3 options: "Auto", "Enabled" and "Disabled".
This feature will opportunistically lower the turbo frequency to increase energy efficiency. If this option is disabled, turbo frequency will remain constant.
Default setting is "Auto".
Enhanced C-States
This BIOS option allows 2 options: "Enabled" and "Disabled".
This feature enables or disables C1E state. If this option is enabled, CPU will switch to minimum speed when all cores enter C-State.
Default setting is "Enabled".
Fan Control
This BIOS option allows 2 options: "Auto" and "Full".
The default setting is "Auto", which allows the system to control the fan speed according to the system temperature. If "Full" is selected, the system runs fans at 100% speed and it may improve the system performance. But it increases the power consumption of the system.
Default setting is "Auto".
Hardware Prefetcher
This BIOS option allows 2 options: "Enabled" and "Disabled".
This prefetcher looks for data streams on the assumption that if the data is requested at address A and A+1, the data will also presumably be required at address A+2. This data is then prefetched into the L2 cache from the main memory.
Default setting is "Enabled".
Hyper-Threading
This BIOS option enables or disables additional hardware thread which shares same physical core. Generally "Enabled" is recommended but disabling it makes sense for the application which requires the shortest possible response times.
Default setting is "Enabled".
Intel Virtualization Technology
This BIOS option enables or disables additional virtualization functions of the CPU. If the server is not used for virtualization, this option should be set to "Disabled". This can result in energy savings.
Default setting is "Enabled".
Intel(R) Speed Shift Technology
This BIOS option enables or disables Intel Speed Shif Technology support. If this option is enabled, CPU will operate in a way that with the hardware determined algorism and OS can hand control of the frequency and voltage back to the processor.
Default setting is "Enabled".
Native ASPM
This BIOS option allows 2 options: "Enabled" and "Disabled".
This feature enables or disables OS to control PCIe Active-state power management (ASPM) features. If this option is enabled, OS will control ASPM feature of PCIe devices.
Default setting is "Enabled".
Native PCIE Enable
This BIOS option allows 2 options: "Enabled" and "Disabled".
This feature enables or disables OS to control below features: Hot Plug, SHPC Native Hot Plug control, Power Management Events, PCIe Advanced Error Reporting control, PCIe Capability Structure control, and Latency Tolerance Reporting control.
Default setting is "Enabled".
Package C-State Demotion
This BIOS option allows 2 options: "Enabled" and "Disabled".
This feature enables or disables Package C-State Demotion for saving power by avoiding multiple transitions from deeper to shallower Package C-State. When OS requestes a shallower Package C-State to CPU in deeper Package C-State, this feature can change it to deeper Package C-State than requested automatically using history information.
Default setting is "Disabled".
Package C-State limit
This BIOS option allows 7 options: "C0", "C2", "C3", "C6", "C7", "C7S", and "Auto"
Package C-States is one of energy-saving options of the processor, which not only allow the individual cores of a processor, but the entire processor chip to be put into a type of sleep state. As a result, power consumption is even further reduced. But the "waking-up time" that is required to change from the lower package C-States to the active (C0) state is even longer in comparison with the CPU or core C-States. If the "C0" setting is made in the BIOS, the processor chip always remains active. It can improve the performance of latency sensitive workloads.
Default setting is "C0".
Package C-State un-demotion
This BIOS option allows 2 options: "Enabled" and "Disabled".
This feature enables processor to switch back to the original requested deeper Package C-State considering cases where demotion was the incorrect decision in determing Package C-State depth.
Default setting is "Disabled".
Per Core P State OS control mode
This BIOS option allows 2 options: "Enabled" and "Disabled".
Enable/Disable Per Core P state OS control mode. When this feature is disabled, the highest core request is used for all other core requests.
Default setting is "Enabled".
Race To Halt (RTH)
This BIOS option allows 2 options: "Enabled" and "Disabled".
RTH will dynamically increase CPU frequency in order to enter Package C-State faster to reduce overall power.
Default setting is "Enabled".
REFRESH_2X_MODE
This BIOS option allows 3 options: "Disabled", "1- Enabled for WARM or HOT", and "2- Enabled HOT only".
This feature enables REFRESH 2X mode which maintains an acceptable overall error rate by increase DRAM refresh rate when temperature is WARM or HOT. 0 - Disabled. 1 - iMC enables 2xRefresh rate mode when thermal status is Warm or Hot. 2 - iMC enables 2xRefresh rate mode when thermal status is Hot
Default setting is "Disabled".
SA GV High Gear
This BIOS option allows 2 options: "Gear1" and "Gear2".
Gear Selection for SAGV High point, or when SAGV is disabled.
Default setting is "Gear2".
SW Guard Extensions (SGX)
This BIOS option allows 3 options: "Disabled", "Enabled", and "Software Controlled".
Intel(R) SGX is a CPU extension that applications can use to create and access private memory areas. When "Disabled" is selected, SGX is disabled and cannot be used by applications. When "Enabled" is selected, SGX is enabled and can be used by applications. The reserved size of the private memory is specified by the BIOS. When "Software Controlled" is selected, SGX is enabled and can be used by applications. The reserved size of the private memory is specified by the operating system (OS).
Default setting is "Software Controlled".
VT-d
This BIOS option enables or disables I/O virtualization functions of the CPU. If the server is not used for virtualization, this option should be set to "Disabled".
Default setting is "Enabled".

Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Fujitsu-Platform-Settings-V1.0-RKL-RevB.html,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Fujitsu-Platform-Settings-V1.0-RKL-RevB.xml,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2022 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.1.8.
Report generated on 2022-03-16 13:57:52 by SPEC CPU2017 flags formatter v5178.