CPU2017 Flag Description
Compal Electronics, Inc. SR230-2 (Intel Xeon 6787P)
Test sponsored by Compal Inc.
Copyright © 2016 Intel Corporation. All Rights Reserved.
Base Portability Flags
-
- -DSPEC_LP64
![[suite]](https://www.spec.org/auto/cpu2017/images/suite.png)
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
- -convert big_endian
![[user]](https://www.spec.org/auto/cpu2017/images/user.png)
- FPORTABILITY
-
Specifies that the format will be big endian for INTEGER*1, INTEGER*2, INTEGER*4, or INTEGER*8, and big endian IEEE floating-point for REAL*4, REAL*8, REAL*16, COMPLEX*8,
COMPLEX*16, or COMPLEX*32.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
Peak Portability Flags
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
- -convert big_endian
- FPORTABILITY
-
Specifies that the format will be big endian for INTEGER*1, INTEGER*2, INTEGER*4, or INTEGER*8, and big endian IEEE floating-point for REAL*4, REAL*8, REAL*16, COMPLEX*8,
COMPLEX*16, or COMPLEX*32.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
-
- -DSPEC_LP64
- PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
Base Optimization Flags
-
-
-
-
-
-
-
-
-
-
-
-
- -Wno-implicit-int
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -nostandard-realloc-lhs
- EXTRA_FOPTIMIZE
-
Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the
right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has
the same effect as option assume realloc_lhs.
If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the
correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -Wno-implicit-int
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
- -nostandard-realloc-lhs
- EXTRA_FOPTIMIZE
-
Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the
right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has
the same effect as option assume realloc_lhs.
If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the
correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -Wno-implicit-int
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -Wno-implicit-int
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
- -nostandard-realloc-lhs
- EXTRA_FOPTIMIZE
-
Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the
right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has
the same effect as option assume realloc_lhs.
If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the
correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.
-
-
-
-
Peak Optimization Flags
-
-
-
-
-
-
-
-
-
-
-
- EXTRA_FOPTIMIZE
-
Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the
right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has
the same effect as option assume realloc_lhs.
If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the
correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -Wno-implicit-int
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
- -nostandard-realloc-lhs
- EXTRA_FOPTIMIZE
-
Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the
right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has
the same effect as option assume realloc_lhs.
If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the
correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.
-
-
-
-
-
-
-
-
-
-
-
-
- -xCORE-AVX2
- PASS1_CFLAGS, PASS1_CXXFLAGS, PASS1_LDFLAGS
-
Code is optimized for Intel(R) processors with support for AVX2 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
- -xCORE-AVX512
- COPTIMIZE, CXXOPTIMIZE
-
Code is optimized for Intel(R) processors with support for CORE-AVX512 instructions.
The resulting code may contain unconditional use of features that are not supported
on other processors. This option also enables new optimizations in addition to
Intel processor-specific optimizations including advanced data layout and code
restructuring optimizations to improve memory accesses for Intel processors.
Do not use this option if you are executing a program on a processor that
is not an Intel processor. If you use this option on a non-compatible processor
to compile the main program (in Fortran) or the function main() in C/C++, the
program will display a fatal run-time error if they are executed on unsupported
processors.
-
-
-
-
-
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -Wno-implicit-int
- EXTRA_CFLAGS
-
-Wno-implicit-int is needed to allow the compiler to accept invalid C code where the type specifier is missing. With this diagnostic disabled, the missing type will be interpreted as `int`, as in C89 (the last version of C in which implicit type specifiers were allowed).
-
-
- -nostandard-realloc-lhs
- EXTRA_FOPTIMIZE
-
Option standard-realloc-lhs (the default), tells the compiler that when the left-hand side of an assignment is an allocatable object, it should be reallocated to the shape of the
right-hand side of the assignment before the assignment occurs. This is the current Fortran Standard definition. This feature may cause extra overhead at run time. This option has
the same effect as option assume realloc_lhs.
If you specify nostandard-realloc-lhs, the compiler uses the old Fortran 2003 rules when interpreting assignment statements. The left-hand side is assumed to be allocated with the
correct shape to hold the right-hand side. If it is not, incorrect behavior will occur. This option has the same effect as option assume norealloc_lhs.
-
-
-
-
Implicitly Included Flags
This section contains descriptions of flags that were included implicitly
by other flags, but which do not have a permanent home at SPEC.
-
- -O3
-
Enable O2 optimizations plus more aggressive optimizations,
such as prefetching, scalar replacement, and loop and memory
access transformations. Enable optimizations for maximum speed,
such as:
- Loop unrolling, including instruction scheduling
- Code replication to eliminate branches
- Padding the size of certain power-of-two arrays to allow
more efficient cache use.
On IA-32 and Intel EM64T processors, when O3 is used with options
-ax or -x (Linux) or with options /Qax or /Qx (Windows), the compiler
performs more aggressive data dependency analysis than for O2, which
may result in longer compilation times.
The O3 optimizations may not cause higher performance unless loop and
memory access transformations take place. The optimizations may slow
down code in some cases compared to O2 optimizations.
The O3 option is recommended for applications that have loops that heavily
use floating-point calculations and process large data sets.
- Includes:
-
- -O2
-
Enable optimizations for speed. This is the generally recommended
optimization level. This option also enables:
- Inlining of intrinsics
- Intra-file interprocedural optimizations, which include:
- inlining
- constant propagation
- forward substitution
- routine attribute propagation
- variable address-taken analysis
- dead static function elimination
- removal of unreferenced variables
- The following capabilities for performance gain:
- constant propagation
- copy propagation
- dead-code elimination
- global register allocation
- global instruction scheduling and control speculation
- loop unrolling
- optimized code selection
- partial redundancy elimination
- strength reduction/induction variable simplification
- variable renaming
- exception handling optimizations
- tail recursions
- peephole optimizations
- structure assignment lowering and optimizations
- dead store elimination
- Includes:
-
- -O1
-
Enable optimizations for speed and disables some optimizations that increase code size and affect speed.
To limit code size, this option:
- Enable global optimization; this includes data-flow analysis,
code motion, strength reduction and test replacement, split-lifetime
analysis, and instruction scheduling.
- Disables intrinsic recognition and intrinsics inlining.
The O1 option may improve performance for applications with very large
code size, many branches, and execution time not dominated by code within loops.
-O1 sets the following options:
-funroll-loops0, -fno-builtin, -mno-ieee-fp, -fomit-framepointer, -ffunction-sections, -ftz
- Includes:
-
-
-
-
-
-
- submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
- When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to
specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
- /usr/bin/taskset [options] [mask] [pid | command [arg] ... ]:
taskset is used to set or retreive the CPU affinity of a running
process given its PID or to launch a new COMMAND with a given CPU
affinity. The CPU affinity is represented as a bitmask, with the
lowest order bit corresponding to the first logical CPU and highest
order bit corresponding to the last logical CPU. When the taskset
returns, it is guaranteed that the given program has been scheduled
to a specific, legal CPU, as defined by the mask setting.
- [mask]: The bitmask (in hexadecimal) corresponding to a specific
SPECCOPYNUM. The specific example above, computes this mask value in the variable $MYMASK.
The value of this mask for the first copy of a
rate run will be 0x00000001, for the second copy of the rate will
be 0x00000002 etc. Thus, the first copy of the rate run will have a
CPU affinity of CPU0, the second copy will have the affinity CPU1
etc.
- $command: Program to be started, in this case, the benchmark instance to be started.
- submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
- When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to
specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
- syntax: numactl [--interleave=nodes] [--preferred=node] [--physcpubind=cpus] [--cpunodebind=nodes] [--membind=nodes] [--localalloc] command args ...
- numactl runs processes with a specific NUMA scheduling or memory placement policy. The policy is set for a command and inherited by all of its children.
- "--localalloc" instructs numactl to keep a process memory on the local node while "-m" specifies which node(s) to place a process memory.
- "--physcpubind" specifies which core(s) to bind the process. In this case, copy 0 is bound to processor 0 etc.
- For full details on using numactl, please refer to your Linux documentation, 'man numactl'
- numactl --interleave=all "runspec command"
- Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes.
When memory cannot be allocated on the current interleave target fall back to other nodes.
- KMP_STACKSIZE
- Specify stack size to be allocated for each thread.
- KMP_AFFINITY
- Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.
Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.
- Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.
- Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
- OMP_NUM_THREADS
- Sets the maximum number of threads to use for OpenMP* parallel regions if no
other value is specified in the application. This environment variable
applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
Example syntax on a Linux system with 8 cores:
export OMP_NUM_THREADS=8
- OMP_STACKSIZE
- The OMP_STACKSIZE environment variable controls the size of the stack for threads created by the OpenMP implementation
- Set stack size to unlimited
- The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
- Free the file system page cache
- The command "echo 3> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache as well as reclaimable slab objects like dentries and inodes.
- MALLOC_CONF
- Used for Jemalloc tuning at runtime. MALLOC_CONF=retain:true will retain unused virtual memory for later resue rather than discarding it.
Red Hat Specific features
- Transparent Huge Pages
- On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads.
If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.
OS Tuning
ulimit:
is a command used to set or check user limits on system resources such as memory, CPU, and the number of open files.Below are common usages of ulimit:
- ulimit -s : Sets the stack size limit.
- ulimit -l : Sets the maximum amount of memory that can be locked into RAM.
- ulimit -n : Limits the maximum number of open file descriptors.
- ulimit -u : Limits the maximum number of user processes that can be created.
irqbalance:
irqbalance is a Linux background service that distributes hardware interrupts across multiple CPU cores to prevent overloading a single core and improve system performance.
Performance Governors (Linux):
are one of Linux's CPU frequency scaling mechanisms, used to determine how the CPU frequency should be managed.Simply put, it controls "how fast the CPU should run under different conditions."Common CPU governors include::
- cpupower frequency-set -g performance : Keeps the CPU running at the highest frequency for maximum performance (but consumes more power).
- cpupower frequency-set -g powersave : Keeps the CPU running at the lowest frequency to save power at the cost of performance.
- cpupower frequency-set -g ondemand : Dynamically switches between high and low frequencies based on system load.
- cpupower frequency-set -g conservative : Similar to ondemand, but changes frequency more gradually for smoother transitions.
- cpupower frequency-set -g schedutil : Adjusts frequency based on information from the task scheduler, balancing performance and power saving.
--governor,-g :
When set to performance, the CPU will always operate at its maximum frequency to deliver the highest computing performance.This will improve overall system performance.
Many companies execute the following command when conducting system performance testing to ensure that the CPU operates at its maximum frequency.
- cpupower frequency-set -g performance
tuned-adm:
is a command-line tool used to manage performance tuning settings on Linux systems. It allows users to select predefined tuning profiles that automatically adjust CPU, power saving, I/O, and network parameters according to the system’s intended usage, optimizing either performance or energy efficiency.The following four are the most commonly used parameters:
- throughput-performance: The throughput-performance profile is optimized for workloads requiring high data throughput. It keeps the CPU at maximum frequency, disables power-saving features, and tunes IRQ and I/O settings to enhance processing efficiency. Ideal for database and storage servers.
- latency-performance: The latency-performance profile targets minimal latency. It disables most power-saving options, keeps the CPU at maximum frequency for long durations, and enhances NUMA locality and IRQ distribution. Best suited for real-time or high-performance computing environments.
- balanced: The balanced profile is a general-purpose setting that provides a compromise between performance and power savings. It dynamically adjusts CPU frequency based on system load and enables moderate power-saving features. It is suitable for general servers or systems without specific performance requirements.
- powersave: The powersave profile prioritizes energy efficiency by setting the CPU to its lowest frequency and enabling all available power-saving features. It is suitable for laptops or idle servers where performance is not critical and power reduction is desired.
Enable LP [Global] (Default = ALL LPs):
Enable LP [Global] to represent the number of logical processors (LP). LP is a term that is common for cloud instances to represent a vCPU.Values for this BIOS option can be:
LLC dead line alloc (Default = Enable):
It is a BIOS setting that controls whether a CPU cache line, when it is about to be written back to memory (i.e., a dead-line), is still allowed to be allocated into the LLC (Last Level Cache, typically L3 Cache).Values for this BIOS option can be:
Energy Efficient Turbo (Default = Enable):
is a technology that allows the processor to automatically boost its frequency based on workload while maintaining energy efficiency.Values for this BIOS option can be:
Enhanced Halt State (C1E) (Default = Enable):
is a mechanism that allows the processor to automatically reduce voltage and frequency during idle periods to enter a low-power state, while still enabling a quick return to full operation to balance power saving and performance.Values for this BIOS option can be:
LLC Prefetch (Default = Disable):
The LLC prefetcher is a feature that allows the processor, under a non-inclusive cache architecture, to prefetch data directly into the Last Level Cache (LLC) to improve memory access efficiency, though in some cases, disabling it may actually enhance performance.Values for this BIOS option can be:
AMP Prefetch (Default = Enable):
The AMP prefetcher is a mechanism that predicts future memory access patterns based on delta sequences between cache accesses and prefetches data into the mid-level cache (MLC), enhancing data retrieval efficiency without issuing LLC prefetches.Values for this BIOS option can be:
Patrol Scrub (Default = Enable at End of POST):
is a background memory scanning and correction mechanism. It periodically and proactively scans each bit of system memory to detect correctable ECC errors, and attempts to automatically repair them when such errors are found.Values for this BIOS option can be:
- Disable: Completely disables the Patrol Scrub mechanism.
- Enable at End of POST: After completing the POST (Power-On Self Test), the system performs a full memory scan.
Homeless Prefetch (Default = Auto):
is a mechanism that allows data to be prefetched into the L2 cache when cache resources are limited to reduce latency, but it may impose a burden on uncore resources under certain workloads.Values for this BIOS option can be:
DCU Streamer Prefetcher (Default = Enable):
is an L1 data cache prefetcher. Recommended default setting is Enabled. In some cases, setting this option to disabled can improve performance. Values for this BIOS option can be:
Package C State (Default = Auto):
The system automatically manages C-state transitions based on workload and platform policies.Values for this BIOS option can be:
- C0/C1 state:Only allows the processor to enter basic idle states (C1).Provides fast wake-up latency with minimal power savings.Recommended for latency-sensitive or real-time workloads.
- C2 state:Enables a deeper idle state than C1, offering more power savings at the cost of slightly higher latency.
- C6(non Retention) state:Allows the processor to enter a deep power-saving state where core power and cache are flushed.“Non Retention” means cache contents are not preserved, leading to higher wake-up latency.
- No Limit:The processor is allowed to enter the deepest supported C-state available on the platform.Maximizes power savings, but may increase wake latency.
- Auto: Automatically manages Package C-states based on workload.
ENERGY_PERF_BIAS_CFG mode (Default = Balanced Performance):
It is a hint provided by the processor to the BIOS or operating system to guide the trade-off between power efficiency and performance.Values for this BIOS option can be:
- Balanced Performance: Prioritizes performance while moderately considering power efficiency; a compromise between full performance and power saving.
- Performance: Force performance priority; the CPU maintains higher frequencies, disregarding power-saving considerations.
- Balanced Power: Prioritizes power saving while maintaining a reasonable level of performance; suitable for reducing power consumption without heavily sacrificing performance.
- Power: Prioritizes power saving; the system aggressively reduces CPU power consumption, even at the expense of performance.
Virtual Numa (Default = Disable):
Divide physical NUMA nodes into evenly sized virtual NUMA nodes in ACPI table. This may improve Windows performance on CPUs with more than 64 logical processors.Values for this BIOS option can be:
Hardware P-States (Default = Native Mode):
(HWP) are the key components of HWPM which deals with P-state control. HWP works by freeing the operating system from making direct frequency decisions.Values for this BIOS option can be:
- Disable: fix the core frequency to P1.
- Native Mode:the OS provides high level hints or constraints to hardware and hardware makes pstate decisions by observing core statistics and OS-provided guidance or hints.
- Out Of Band Mode:hardware autonomously makes pstate decisions with OS completely excluded from this process.
- Native Mode With No Legacy Support:Completely disables the legacy P-State interface, allowing the processor to use HWP exclusively to manage core frequency and power.
Hardware Prefetcher(Default=Enable):
Hardware Prefetcher: (a.k.a. MLC Streamer Prefetcher) is an L2 cache prefetcher. Recommended default setting is Enabled. In some cases, setting this option to disabled can improve performance. Values for this BIOS option can be:
Adjacent Cache Prefetch(Default=Enable):
Adjacent Cache Prefetch: (a.k.a. MLC Spatial Prefetcher) is an L2 cache prefetcher. Recommended default setting is Enabled. In some cases, setting this option to disabled can improve performance. Values for this BIOS option can be:
DCU IP Prefetcher(Default=Enable):
DCU IP Prefetcher: the DCU Instruction Pointer (IP) prefetcher is an L1 cache prefetcher. Recommended default setting is Enabled. In some cases, setting this option to disabled can improve performance. Values for this BIOS option can be:
Turbo Mode(Default=Enable):
Turbo Boost Technology requires a PC with a processor with Intel Turbo Boost Technology capability. Intel Turbo Boost Technology performance varies depending on hardware, software, and overall system configuration.Values for this BIOS option can be:
Power Performance Tuning(Default=OS Controls EPB):
Power Performance Tuning is a BIOS setting that determines whether the processor’s performance and power efficiency preferences are managed by the operating system, BIOS, or an external controller.Values for this BIOS option can be:
- OS Controls EPB : Power and performance tuning are managed by the operating system.
- BIOS Controls EPB:Power and performance tuning are managed by the BIOS settings, ignoring OS-level adjustments.
- PECI Controls EPB:Adjusted through PECI (Platform Environment Control Interface) by external controllers such as the BMC.
Performance Mode(Default=Balanced):
It is a common setting in server BIOS used to control the system’s overall performance optimization strategy and power behavior.Values for this BIOS option can be:
- Balance : :is the default setting for most users, providing a compromise between performance and power efficiency.
- Performance:allows your system to operate at maximum performance, but power consumption and temperature will increase.
- Custom:is intended for advanced users or server administrators who need to manually fine-tune detailed parameters.
Latency Optimized Mode(Default=Disable):
The highest performance mode (default on previous generations) where core and uncore frequencies are running up to their maximum limits within the RAPL budget. This mode is not performance-per-Watt optimized across the load line. Values for this BIOS option can be:
NUMA(Default=Enable):
Each CPU (or each group of CPUs) has its own "local memory," which can be accessed faster. Accessing "remote memory" across CPUs is slower.
When NUMA is enabled, the operating system can arrange thread execution and memory allocation based on the "physical locality" of CPUs and memory, reducing latency and improving performance. Values for this BIOS option can be:
Opportunistic LLC to SF Migration(Default=Disable):
When data is present in the LLC (Last Level Cache, such as L3 Cache), the system may opportunistically migrate it to the Snoop Filter (SF) to optimize and accelerate inter-core data sharing.Values for this BIOS option can be:
Last updated May 7, 2025.
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2025 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.1.9.
Report generated on 2025-06-02 14:36:45 by SPEC CPU2017 flags formatter v5178.
![[benchmark]](https://www.spec.org/auto/cpu2017/images/benchmark.png)