SGI Power Challenge Array
The SPECseis96_SM benchmark was run by
Purdue University (SPEC license #HA-7) in West Lafayette, Indiana
on a Silicon Graphics, Inc. (SGI)
Power Challenge Array at
NCSA, University of Illinois on 26-Mar-1997. This code was run using
the message programming model.
||Elapsed Time (secs)
* The SPECseis96_SM metric is 86400/elapased seconds.
Source code base was SPEChpc96.001.
- FPU: MIPS R10010 Floating Point Chip
- SGIMATH: includes industry standard libraries such as Basic
Linear Algebra Subprograms (BLAS), the Extended BLAS (Level 2 and Level
3), EISPACK, LINPACK, and LAPACK.
Internally developed libraries for calculating Fast Fourier Transforms
(FFT's) and Convolutions are also included, as well as select direct sparse
- subroutine vrfyc:Moved 1 line of code which sets variable len
to a position before the if-statement where len is used.
File diff_vrfy.f is included which shows the change.
- compiler flags:
- -64: Generates a 64-bit object.
- -mips4: Generate code using the full MIPS IV (e.g. R8000 or
R10000) instruction set.
- -r10000: Schedule code for the R10000 and add r10000 libraries
to head of library search path.
All phases verified with the given verification files.
The source base is SPECseis96.1.0 .
SPEC High Performance Group