<?xml version="1.0"?>
<!DOCTYPE flagsdescription SYSTEM "http://www.spec.org/dtd/cpuflags1.dtd">
<flagsdescription>

<!-- filename to begin with "EM64T_Intel140_flags" -->
<filename>EM64T_Intel140_flags.xml</filename>

<title>SPEC MPI2007 Flag Description for the Intel(R) C++ Compiler 16.0
for IA32 and Intel 64 applications and Intel(R) Fortran Compiler 16.0 for IA32 and Intel 64 
applications</title>
<platform_settings>
 <![CDATA[ 

    <h2>Machine Configurations</h2>

	<h3>BIOS settings </h3>

	<b>Simultaneous Multithreading</b>
	<p>On 2nd generation Intel Xeon Phi processor and co-processors, 
         Simultaneous Multithreading (SMT), 
        permits 4 independent threads of execution on each core.</p>

	<p><b>Cluster Mode:</b>
	<p> This BIOS switch allows 5 options "All2All", "SNC-2", "SNC-4", "Hemisphere"
and "Quadrant".  Quadrant mode divides the chip into 4 virtual Quadrants.
Quadrant mode can shorten the route length to memory, 
and that enable us to enlarge the bandwidth of memory. </p></p>

	<p><b>Memory Mode</b>
	<p>This BIOS switch allows 3 options "Cache", "Flat", and "Hybrid".
     Flat mode: the 16GB high bandwidth on-chip MCDRAM
  shares a single contiguous address space as the DRAM and is
  partitioned onto the second NUMA node. 
  Cache mode: the MCDRAMs is used as the cache of DDR memory. 
  Hybrid mode: a portion of the MCDRAM is used in flat mode, the rest is used as cache. </p></p>

	<p><b>Turbo Mode</b>
	<p>Enabling this switch allows the processor to provide more computing performance
   at short notice by increasing the frequency above nominal frequency.</p></p>


  ]]> 
  </platform_settings>



</flagsdescription>
