SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2002 Standard Performance Evaluation Corporation
SGI Altix 3000 (1500MHz, Itanium 2)
SPECompMpeak2001 = 31210      
SPECompMbase2001 = 28853      
SPEC license # HPG0014 Tested by: SGI Test site: SGI Test date: Jun-2004 Hardware Avail: Jun-2003 Software Avail: May-2004
Benchmark Reference
Graph Scale
310.wupwise_m 6000 148    40558       148    40558       310.wupwise_m base result bar (40558)
310.wupwise_m peak result bar (40558)
312.swim_m 6000 84.5  71024       84.5  71024       312.swim_m base result bar (71024)
312.swim_m peak result bar (71024)
314.mgrid_m 7300 146    49931       146    49931       314.mgrid_m base result bar (49931)
314.mgrid_m peak result bar (49931)
316.applu_m 4000 101    39780       101    39780       316.applu_m base result bar (39780)
316.applu_m peak result bar (39780)
318.galgel_m 5100 441    11559       417    12242       318.galgel_m base result bar (11559)
318.galgel_m peak result bar (12242)
320.equake_m 2600 119    21796       89.8  28947       320.equake_m base result bar (21796)
320.equake_m peak result bar (28947)
324.apsi_m 3400 142    23938       124    27393       324.apsi_m base result bar (23938)
324.apsi_m peak result bar (27393)
326.gafort_m 8700 472    18446       391    22223       326.gafort_m base result bar (18446)
326.gafort_m peak result bar (22223)
328.fma3d_m 4600 233    19769       190    24178       328.fma3d_m base result bar (19769)
328.fma3d_m peak result bar (24178)
330.art_m 6400 87.4  73243       87.4  73243       330.art_m base result bar (73243)
330.art_m peak result bar (73243)
332.ammp_m 7000 559    12520       559    12520       332.ammp_m base result bar (12520)
332.ammp_m peak result bar (12520)
SPECompMbase2001 28853        
  SPECompMpeak2001 31210        

Hardware Vendor: SGI
Model Name: SGI Altix 3000 (1500MHz, Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 32 cores, 32 chips, 1 core/chip
CPU(s) orderable: 4-256
Primary Cache: 16KBI + 16KBD (on chip) per core
Secondary Cache: 256KB (on chip) per core
L3 Cache: 6.0MB (on chip) per core
Other Cache: N/A
Memory: 128 GB (32*512MB PC2700 DIMMS per 4 core module)
Disk Subsystem: 1 x 36 GB SCSI (Seagate Cheetah 15k rpm)
Other Hardware: None
OpenMP Threads: 32
Parallel: OpenMP
Operating System: SGI ProPack(TM) 3
Compiler: Intel(R) Fortran Compiler for Linux 8.0 (Build 20040519)
Intel(R) C++ Compiler for Linux 8.0 (Build 20040519)
File System: xfs
System State: Multi-user
Notes / Tuning Information
 Baseline optimization flags: 
   C programs:       -openmp -O3 -ipo -ansi -ansi_alias -auto_ilp32 (ONESTEP)
   Fortran programs: -openmp -O3 -ipo (ONESTEP)
   OpenMP runtime library libguide.a statically linked
 Portability Flags:
   318.galgel_m: -FI -132
 Extra Flags:

 Baseline user environment:
   limit stacksize 64000
   KMP_SCHEDULE static,balanced

 Peak optimization flags:
    310.wupwise_m: basepeak=true
    312.swim_m: basepeak=true
    314.mgrid_m: basepeak=true
    316.applu_m: basepeak=true
    318.galgel_m: -openmp -O3 -ipo (ONESTEP)
    320.equake_m: -openmp -O3 -ipo -ansi -ansi_alias -auto_ilp32 (ONESTEP)
    324.apsi_m: -openmp -O3 -ipo (ONESTEP)
    326.gafort_m: -openmp -O3 -ipo (ONESTEP)
    328.fma3d_m: -openmp -O3 -ipo (ONESTEP)
    330.art_m: basepeak=true
    332.ammp_m: basepeak=true

 Alternate sources:
 Add critical region around update of linked list in parallel loop.
 Approved src.alt available as ompm-purdue1-20040324.tar.gz
 Used for 330.art_m, base and peak.
 Peak sources:
 SPEC OMPL2001 source for 64bit systems modified for SPEC OMPM2001.
 Available as ompl src.alt in SPEC OMP v3.0
 Used for 320.equake_m, 324.apsi_m, 326.gafort_m, and 328.fma3d_m.
 For all benchmarks threads were bound to cores using the following submit command:
 dplace -x2 -cNTM1,0 $command,
 where NTM1 is the number of threads minus 1.
 This binds threads in order of creation, beginning with the master
 thread on core NTM1, the first slave thread on core NTM1-1, and so on.
 The -x2 flag instructs dplace to skip placement of the lightweight
 OpenMP monitor thread, which is created prior to the slave threads.

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Copyright © 1999-2002 Standard Performance Evaluation Corporation

First published at SPEC.org on 23-Jun-2004

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