SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2002 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer p5 510 (1650 MHz, 2 CPU)
SPECompMpeak2001 = 6108     
SPECompMbase2001 = 5478     
SPEC license # HPG0005 Tested by: IBM Test site: Austin, TX Test date: Feb-2005 Hardware Avail: Feb-2005 Software Avail: Dec-2004
Benchmark Reference
Graph Scale
310.wupwise_m 6000 928    6463      928    6463      310.wupwise_m base result bar (6463)
310.wupwise_m peak result bar (6463)
312.swim_m 6000 1528     3926      1353     4436      312.swim_m base result bar (3926)
312.swim_m peak result bar (4436)
314.mgrid_m 7300 2685     2719      1490     4900      314.mgrid_m base result bar (2719)
314.mgrid_m peak result bar (4900)
316.applu_m 4000 799    5004      662    6046      316.applu_m base result bar (5004)
316.applu_m peak result bar (6046)
318.galgel_m 5100 389    13103       330    15435       318.galgel_m base result bar (13103)
318.galgel_m peak result bar (15435)
320.equake_m 2600 377    6898      377    6898      320.equake_m base result bar (6898)
320.equake_m peak result bar (6898)
324.apsi_m 3400 672    5060      590    5766      324.apsi_m base result bar (5060)
324.apsi_m peak result bar (5766)
326.gafort_m 8700 1553     5603      1553     5602      326.gafort_m base result bar (5603)
326.gafort_m peak result bar (5602)
328.fma3d_m 4600 1509     3048      1508     3049      328.fma3d_m base result bar (3048)
328.fma3d_m peak result bar (3049)
330.art_m 6400 442    14473       441    14503       330.art_m base result bar (14473)
330.art_m peak result bar (14503)
332.ammp_m 7000 2049     3416      2049     3416      332.ammp_m base result bar (3416)
332.ammp_m peak result bar (3416)
SPECompMbase2001 5478       
  SPECompMpeak2001 6108       

Hardware Vendor: IBM Corporation
Model Name: IBM eServer p5 510 (1650 MHz, 2 CPU)
CPU MHz: 1650
FPU: Integrated
CPU(s) enabled: 2 cores, 1 chip, 2 cores/chip (SMT on)
CPU(s) orderable: 1,2
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 1 DCM/SUT
Other Cache: None
Memory: 8x1GB
Disk Subsystem: 2x36GB SCSI, 15K RPM
Other Hardware: None
OpenMP Threads: 4
Parallel: OpenMP
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 7.0 for AIX
XL Fortran Enterprise Edition V9.1 for AIX
Other Software: ESSL for AIX V4.2
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information

 Portability Flags & Environment Variables
   -qfixed used in: 310.wupwise_m, 312.swim_m, 314.mgrid_m, 316.applu_m, 324.apsi_m
   -qfixed=80 used in: 318.galgel_m
   -qsuffix=f=f90 used in: 318.galgel_m, 326.gafort_m, 328.fma3d_m

 Base Flags
   C:       -qpdf1/pdf2
            -q64 -O5 -blpdata -qalign=natural -qhot=arraypad -Q -qsmp=omp
   FORTRAN: -O5 -qhot=arraypad -qipa=noobject -qipa=partition=large -qmaxmem=-1 -qsmp=omp

 Base & Peak User Environment:

 Peak Flags:
   -qsmp=omp used in all cases
   310.wupwise_m:    basepeak=1
   312.swim_m:       -q64 -O5 -qarch=pwr3 -qtune=pwr3 -blpdata
   314.mgrid_m:      -qpdf1/pdf2
                     -q64 -O5 -blpdata -qalign=natural -qhot=arraypad -Q
   316.applu_m:      -q64 -O4 -qhot -qmaxmem=-1 -blpdata
   318.galgel_m:     -O5 -q64 -qessl -lesslsmp -blpdata
   320.equake_m:     basepeak=1
   324.apsi_m:       -qpdf1/pdf2
                     -q64 -O5 -blpdata -qalign=struct=natural -qhot=arraypad -Q
   326.gafort_m:     -O5 -qipa=partition=large
   328.fma3d_m:      -O5 -qhot=arraypad -qipa=noobject -qipa=partition=large -qmaxmem=-1
   330.art_m:        -qpdf1/pdf2
                     -q64 -O5 -blpdata -qalign=natural -qhot=arraypad -Q
   332.ammp_m:       -qpdf1/pdf2
                     -q64 -O5 -blpdata -qalign=natural -qhot=arraypad -Q

  Alternate sources:
     Add critical region around update of linked list in parallel loop.
     Required src.alt available as ompm-purdue1-20040324.tar.gz
     Used for 330.art_m, base and peak.

  Peak sources:
     SPEC OMPL2001 source for 32bit systems modified for SPEC OMPM2001 used
     with 312.swim_m, 316.applu_m, 326.gafort_m. Available as ompl.32 src.alt
     in SPEC OMP2001 v3.0.

  APAR IY62267 was applied to AIX 5L V5.3 to achieve Mantainence Level 1.

  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  ESSL: Engineering and Scientific Subroutine Library
  SUT:  Acronym for "System Under Test"

  C:          IBM XL C for AIX invoked as xlc_r
  Fortran 90: IBM XL Fortran for AIX invoked as xlf90_r

  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
     vmo -r -o lgpg_regions=512 -o lgpg_size=16777216 -o memory_affinity=1
     chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
     shutdown -r

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Copyright © 1999-2002 Standard Performance Evaluation Corporation

First published at SPEC.org on 03-Mar-2005

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