SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Compaq Computer Corporation
AlphaServer GS160 Model 16 68/1001
SPECint_rate2000 = 111    
SPECint_rate_base2000 = 98.9  
SPEC license # 2 Tested by: Compaq NH Test date: Jun-2001 Hardware Avail: Jun-2001 Software Avail: Aug-2001
Graph Scale Benchmark Base
Copies Runtime Ratio
164.gzip base result bar (86.3)
164.gzip peak result bar (87.4)
164.gzip 16 301    86.3   16 297    87.4  
175.vpr base result bar (86.9)
175.vpr peak result bar (88.9)
175.vpr 16 299    86.9   16 292    88.9  
176.gcc base result bar (104)
176.gcc peak result bar (132)
176.gcc 16 196    104     16 155    132    
181.mcf base result bar (66.3)
181.mcf peak result bar (90.6)
181.mcf 16 504    66.3   16 369    90.6  
186.crafty base result bar (143)
186.crafty peak result bar (143)
186.crafty 16 130    143     16 130    143    
197.parser base result bar (76.2)
197.parser peak result bar (96.6)
197.parser 16 439    76.2   16 346    96.6  
252.eon base result bar (124)
252.eon peak result bar (146)
252.eon 16 194    124     16 165    146    
253.perlbmk base result bar (102)
253.perlbmk peak result bar (111)
253.perlbmk 16 328    102     16 300    111    
254.gap base result bar (54.8)
254.gap peak result bar (65.7)
254.gap 16 373    54.8   16 311    65.7  
255.vortex base result bar (134)
255.vortex peak result bar (144)
255.vortex 16 263    134     16 245    144    
256.bzip2 base result bar (112)
256.bzip2 peak result bar (121)
256.bzip2 16 250    112     16 230    121    
300.twolf base result bar (151)
300.twolf peak result bar (153)
300.twolf 16 369    151     16 364    153    
  SPECint_rate_base2000 98.9    
  SPECint_rate2000 111    

Hardware Vendor: Compaq Computer Corporation
Model Name: AlphaServer GS160 Model 16 68/1001
CPU: Alpha 21264C
CPU MHz: 1001
FPU: Integrated
CPU(s) enabled: 16 cores, 16 chips, 1 core/chip
CPU(s) orderable: 1 to 16
Parallel: No
Primary Cache: 64KB(I)+64KB(D) on chip
Secondary Cache: 8MB off chip per CPU
L3 Cache: None
Other Cache: None
Memory: 128GB
Disk Subsystem: mfs (Memory File System)
Other Hardware: None
Operating System: Tru64 UNIX V5.1
+Patch Kit 2
Compiler: Compaq C V6.4-214-46B59
Program Analysis Tools V2.0
Spike V5.2 DTK (1.461 46B5P)
Compaq C++ V6.3-010-46B2F
File System: mfs
System State: Single-user
Notes / Tuning Information
 Baseline C  : cc  -arch ev6 -fast +CFB ONESTEP 
          C++: cxx -arch ev6 -O2        ONESTEP 
   All but 252.eon: cc -g3 -arch ev6 ONESTEP
      164.gzip: -fast -O4 -non_shared +CFB 
       175.vpr: -fast -O4 -assume restricted_pointers +CFB 
       176.gcc: -fast -O4 -xtaso_short -all -ldensemalloc -none
                +CFB +IFB 
       181.mcf: -fast -xtaso_short +CFB +IFB +PFB
    186.crafty: same as base
    197.parser: -fast -O4 -xtaso_short -non_shared +CFB
       252.eon: cxx -arch ev6 -O2 -all -ldensemalloc -none 
   253.perlbmk: -fast -non_shared +CFB +IFB 
       254.gap: -fast -O4 -non_shared +CFB +IFB +PFB 
    255.vortex: -fast -non_shared +CFB +IFB
     256.bzip2: -fast -O4 -non_shared +CFB 
     300.twolf: -fast -O4 -assume restricted_pointers -all 
                -ldensemalloc -none +CFB +IFB

 Most benchmarks are built using one or more types of 
 profile-driven feedback.  The types used are designated
 by abbreviations in the notes:

 +CFB: Code generation is optimized by the compiler, using 
       feedback from a training run.  These commands are
       done before the first compile (in phase "fdo_pre0"):

            mkdir /tmp/pp
            rm -f /tmp/pp/${baseexe}*

       and these flags are added to the first and second compiles:

            PASS1_CFLAGS = -prof_gen_noopt -prof_dir /tmp/pp
            PASS2_CFLAGS = -prof_use       -prof_dir /tmp/pp
      (Peak builds use /tmp/pp above; base builds use /tmp/pb.)

 +IFB: Icache usage is improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These commands
       are used (in phase "fdo_postN"):  

            mv ${baseexe} oldexe
            spike oldexe -feedback oldexe -o ${baseexe}

 +PFB: Prefetches are improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These
       commands are used (in phase "fdo_post_makeN"):

            rm -f *Counts*
            mv ${baseexe} oldexe
            pixie -stats dstride oldexe 1>pixie.out 2>pixie.err
            mv oldexe.pixie ${baseexe}

       A training run is carried out (in phase "fdo_runN"), and 
       then this command (in phase "fdo_postN"):

            spike oldexe -fb oldexe -stride_prefetch -o ${baseexe}

 When Spike is used for both Icache and Prefetch improvements, 
 only one spike command is actually issued, with the Icache 
 options followed by the Prefetch options.
 Portability: gcc: -Dalloca=__builtin_alloca; crafty: -DALPHA
 perlbmk: -DSPEC_CPU2000_DUNIX; vortex: -DSPEC_CPU2000_LP64
 Information on UNIX V5.1 Patches can be found at
 submit = runon  $command
 sysconfigtab settings:
            max_proc_per_user = 4096
         max_threads_per_user = 4096
        per_proc_data_size     = 21474836480
    max_per_proc_data_size     = 21474836480
        per_proc_address_space = 21474836480
    max_per_proc_address_space = 21474836480
 Spike, and the Program Analysis Tools, are part of the Developers' 
 Tool Kit Supplement, http://www.tru64unix.compaq.com/dtk/ .  The
 features used in this SPEC submission will be available at the web 
 site as a beta kit in August, 2001, and as a production release in
 October, 2001.  The C compiler for this SPEC submission has been
 available at the same location, as a production release, since
 May, 2001.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 09-Jul-2001

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