SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM System p5 575 (2200 MHz, 1 CPU)
SPECint2000 = 1765     
SPECint_base2000 = 1705     
SPEC license # 11 Tested by: IBM Test date: Dec-2005 Hardware Avail: Feb-2006 Software Avail: Feb-2006
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 140    1002      135    1034      164.gzip base result bar (1002)
164.gzip peak result bar (1034)
175.vpr 1400 93.9  1492      92.0  1522      175.vpr base result bar (1492)
175.vpr peak result bar (1522)
176.gcc 1100 61.0  1803      60.5  1819      176.gcc base result bar (1803)
176.gcc peak result bar (1819)
181.mcf 1800 49.5  3640      59.4  3031      181.mcf base result bar (3640)
181.mcf peak result bar (3031)
186.crafty 1000 72.9  1371      59.6  1677      186.crafty base result bar (1371)
186.crafty peak result bar (1677)
197.parser 1800 117    1534      116    1558      197.parser base result bar (1534)
197.parser peak result bar (1558)
252.eon 1300 69.7  1864      69.7  1866      252.eon base result bar (1864)
252.eon peak result bar (1866)
253.perlbmk 1800 159    1131      146    1235      253.perlbmk base result bar (1131)
253.perlbmk peak result bar (1235)
254.gap 1100 70.7  1555      69.5  1582      254.gap base result bar (1555)
254.gap peak result bar (1582)
255.vortex 1900 67.4  2818      59.3  3205      255.vortex base result bar (2818)
255.vortex peak result bar (3205)
256.bzip2 1500 91.3  1644      87.3  1719      256.bzip2 base result bar (1644)
256.bzip2 peak result bar (1719)
300.twolf 3000 156    1925      149    2011      300.twolf base result bar (1925)
300.twolf peak result bar (2011)
SPECint_base2000 1705       
  SPECint2000 1765       

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM System p5 575 (2200 MHz, 1 CPU)
CPU: POWER5+
CPU MHz: 2200
FPU: Integrated
CPU(s) enabled: 1 core, 8 chips, 1 core/chip (SMT off)
CPU(s) orderable: 8,16
Parallel: No
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified, shared (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 8 DCMs/SUT
Other Cache: None
Memory: 64x512MB
Disk Subsystem: 2x73GB SCSI, 15K RPM
Other Hardware: None
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 8.0 for AIX
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information 
  Portability Flags:
    176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
    186.crafty:   -DAIX
    253.perlbmk:  -DSPEC_CPU2000_AIX
    254.gap:      -DSYS_IS_BSD -DSYS_STRING_H
                  -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
    300.twolf:    -DHAVE_SIGNED_CHAR
 
  Base Optimization Flags:
    C:    -qpdf1/pdf2
          -O5 -blpdata -D_ILS_MACROS
    C++:  -qpdf1/pdf2
          -O4 -qalign=natural
 
  Peak Optimization Flags
    164.gzip:     -qpdf1/pdf2
                  -O4 -qfdpr -blpdata
                  fdpr -q -O3
    175.vpr:      -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    176.gcc:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    181.mcf:      -qpdf1/pdf2
                  -O4 -qalign=natural -blpdata
    186.crafty:   -qpdf1/pdf2
                  -O4 -qalign=natural -q64 -lhmu -blpdata
    197.parser:   -qpdf1/pdf2
                  -O4 -qfdpr -D_ILS_MACROS -blpdata
                  fdpr -q -O3
    252.eon:      -qpdf1/pdf2
                  -O4 -qalign=natural
    253.perlbmk:  -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata -lhmu
    254.gap:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -blpdata
    255.vortex:   -qpdf1/pdf2
                  -O4 -qfdpr -lhmu -blpdata
                  fdpr -q -O3
    256.bzip2:    -qpdf1/pdf2
                  -O5 -qfdpr -blpdata
                  fdpr -q -O3
    300.twolf:    -O5 -qfdpr -blpdata
                  fdpr -q -O3
 
 
  The installed OS level is AIX 5L for POWER version 5.3 with the 5300-04 Recommended Technology Level.
 
  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"
 
  Extended C:     IBM XL C for AIX invoked as cc
  C++:            IBM XL C for AIX invoked as xlC
 
  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
      vmo -r -o lgpg_regions=800 -o lgpg_size=16777216
      chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
      shutdown -rF
      export MEMORY_AFFINITY=MCM
 
  The following config-file entry was used to assign each benchmark process to a core:
       submit = bindprocessor \$\$ \$SPECUSERNUM; $command
  The "bindprocessor" AIX command binds a process to a CPU core.
  Seven cores were deconfigured and SMT disabled using the AIX commands
       smtctl -m off -w boot
       bosboot -aD
       shutdown -rF
       drmgr -r -c cpu
       drmgr -r -c cpu
       drmgr -r -c cpu
       drmgr -r -c cpu
       drmgr -r -c cpu
       drmgr -r -c cpu
       drmgr -r -c cpu

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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 08-Mar-2006

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