SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
ASUS Computer International
Asus M2N32-SLI Deluxe, AMD Athlon (TM) 64 4200+
SPECint2000 = 1494     
SPECint_base2000 = 1411     
SPEC license # 13 Tested by: Intel Corporation Test date: Jul-2006 Hardware Avail: Jun-2006 Software Avail: Jun-2006
Benchmark Reference
Time
Base
Runtime
Base
Ratio
Runtime Ratio Graph Scale
164.gzip 1400 114    1225      114    1225      164.gzip base result bar (1225)
164.gzip peak result bar (1225)
175.vpr 1400 143    981     141    990     175.vpr base result bar (981)
175.vpr peak result bar (990)
176.gcc 1100 72.3  1522      72.3  1522      176.gcc base result bar (1522)
176.gcc peak result bar (1522)
181.mcf 1800 174    1035      155    1160      181.mcf base result bar (1035)
181.mcf peak result bar (1160)
186.crafty 1000 71.0  1409      63.8  1567      186.crafty base result bar (1409)
186.crafty peak result bar (1567)
197.parser 1800 135    1337      136    1326      197.parser base result bar (1337)
197.parser peak result bar (1326)
252.eon 1300 48.7  2667      47.8  2719      252.eon base result bar (2667)
252.eon peak result bar (2719)
253.perlbmk 1800 109    1657      99.5  1809      253.perlbmk base result bar (1657)
253.perlbmk peak result bar (1809)
254.gap 1100 69.5  1583      65.7  1675      254.gap base result bar (1583)
254.gap peak result bar (1675)
255.vortex 1900 86.5  2195      77.0  2469      255.vortex base result bar (2195)
255.vortex peak result bar (2469)
256.bzip2 1500 140    1070      132    1136      256.bzip2 base result bar (1070)
256.bzip2 peak result bar (1136)
300.twolf 3000 284    1057      250    1200      300.twolf base result bar (1057)
300.twolf peak result bar (1200)
SPECint_base2000 1411       
  SPECint2000 1494       

Hardware
Hardware Vendor: ASUS Computer International
Model Name: Asus M2N32-SLI Deluxe, AMD Athlon (TM) 64 4200+
CPU: AMD Athlon (TM) 64 4200+
CPU MHz: 2200
FPU: Integrated
CPU(s) enabled: 2 cores, 1 chip, 2 cores/chip
CPU(s) orderable: 1
Parallel: no
Primary Cache: 64KBI + 64KBD on chip, per core
Secondary Cache: 512KB (I+D) on chip, per core
L3 Cache: N/A
Other Cache: N/A
Memory: 2x1 GB, Corsair CM2X1024-8500C5 DDR2-1066 (manually set to DDR2-800 5-5-5-15 in the bios)
Disk Subsystem: SATA, Western Digital WD740GD, 10000 rpm
Other Hardware: None
Software
Operating System: Microsoft Windows XP SP2
Compiler: Intel C++ 9.1 build 20060519Z for IA32
Microsoft Visual Studio .NET 7.0.9466 (libraries)
MicroQuill Smartheap Library 8.0
File System: NTFS
System State: default
Notes / Tuning Information
 GENERAL
 +FDO: PASS1= -Qprof_gen  PASS2= -Qprof_use
  shlW32M-80.lib is the SmartHeap library V8.0 from MicroQuill www.microquill.com
 
  +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
  Portability:
    176.gcc:      -Dalloca=_alloca /F10000000
    186.crafty:   -DNT_i386
    253.perlbmk:  -DSPEC_CPU2000_NTOS -DPERLDLL /MT
    254.gap:      -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO

 Base tuning flags
    for C programs:   -fast -arch:SSE2 -Oi- +FDO
    for C++ programs: -fast -arch:SSE2 -Qcxx-features +FDO
 
    164.gzip:    basepeak=yes
    175.vpr:     -O3 -Qipo -QxW -Qoption,c,-ip_ninl_max_stats=2000,
                 -ip_ninl_max_total_stats=4500 +FDO 
    176.gcc:     basepeak=yes
    181.mcf:     -O3 -Qipo -QaxN +FDO shlW32M-80.lib
    186.crafty:  -O3 -Qipo -QxW +FDO shlW32M-80.lib
    197.parser:  -Oi -Qipo -QxW +FDO shlW32M-80.lib
    252.eon:     -O3 -Qipo -QxW -Qansi_alias -Qoption,c,-ip_ninl_max_stats=2000,
                 -ip_ninl_max_total_stats=4500 +FDO shlW32M-80.lib
    253.perlbmk: -O3 -Qipo -QxW +FDO shlW32M-80.lib
    254.gap:     -O3 -Qipo -QxW +FDO shlW32M-80.lib
    255.vortex:  -O3 -Qipo -arch:SSE -Oi- -Qoption,c,-ip_ninl_max_stats=2000,
                 -ip_ninl_max_total_stats=4500 +FDO shlW32M-80.lib
 The SUT was built with a discrete PCIe graphics card (ATI Radeon X850 XT)
 and an ATX 550W power supply. The 2 DIMMs were configured in dual-channel mode.
 


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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 20-Sep-2006

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