SPEC Accel OpenMP 4.0 Flag Description for the Intel(R) C/C++ Compiler for IA32 and Intel 64 applications and Intel(R) Fortran Compiler for IA32 and Intel 64 applications

Compilers: Intel c/c++/fortran Compiler 17.0.3.191

Operating systems: Linux

Last updated: 04-Apr-2017

The text for many of the descriptions below was taken from the "icc --help".

Copyright © 1985-2017 Intel Corporation. All Rights Reserved.

Sections

Selecting one of the following will take you directly to that section:


Optimization Flags


Portability Flags


Compiler Flags


Other Flags


Shell, Environment, and Other Software Settings

AMD BIOS Setting

Maximum Performance

Maximizes performance and minimizes latency with little regard to power consumption.

SMT Mode

Can be used to disable symmetric multithreading. To re-enable SMT, a POWER CYCLE is needed after selecting the 'Auto' option. WARNING - S3 is NOT SUPPORTED on systems where SMT is disabled.

NUMA node per socket

Specifies the number of desired NUMA nodes per socket. Zero will attempt to interleave the two sockets together.

BIOS settings

Maximum Performance

Mode will maximize the absolute performance of the system without regard for power. In this mode, power consumption is a don't care. Things like fan speed and heat output of the system may increase in addition to power consumption. Efficiency of the system may go down in this mode, but the absolute performance may increase depending on the workload that is running.

Custom

Allows the user to individually modify any of the low-level settings that are preset and unchangeable in any of the other 4 preset modes.

Hyper-Threading

Enabling Hyper-Threading let operating system addresses two virtual or logical cores for a physical presented core. Workloads can be shared between virtual or logical cores when possible. The main function of hyper-threading is to increase the number of independent instructions in the pipeline for using the processor resources more efficiently.

C-States

Legacy: When "Legacy" is selected, the operating system initiates the C-state transitions. For E5/E7 CPUs, ACPI C1/C2/C3 map to Intel C1/C3/C6. For 6500/7500 CPUs, ACPI C1/C3 map to Intel C1/C3 (ACPI C2 is not available). Some OS SW may defeat the ACPI mapping (e.g. intel_idle driver).

Autonomous: When "Autonomous" is selected, HALT and C1 request get converted to C6 requests in hardware.

Disable: When "Disable" is selected, only C0 and C1 are used by the OS. C1 gets enabled automatically when an OS autohalts.

Platform settings

One or more of the following settings may have been applied to the testbed. If so, the "Platform Notes" section of the report will say so; and you can read below to find out more about what these settings mean.