SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Unisys Corporation
Unisys ES7000 ORION 540 (3.0GHz Xeon MP)
SPECint_rate2000 = 310    
SPECint_rate_base2000 = 290    
SPEC license # 15 Tested by: Unisys Corporation Test date: Mar-2004 Hardware Avail: Apr-2004 Software Avail: Mar-2004
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (216)
164.gzip peak result bar (223)		 164.gzip 32 240    216     32 233    223    
175.vpr base result bar (217)
175.vpr peak result bar (242)		 175.vpr 32 239    217     32 215    242    
176.gcc base result bar (275)
176.gcc peak result bar (275)		 176.gcc 32 148    275     32 148    275    
181.mcf base result bar (187)
181.mcf peak result bar (188)		 181.mcf 32 357    187     32 355    188    
186.crafty base result bar (396)
186.crafty peak result bar (425)		 186.crafty 32 93.7  396     32 87.4  425    
197.parser base result bar (401)
197.parser peak result bar (429)		 197.parser 32 167    401     32 156    429    
252.eon base result bar (471)
252.eon peak result bar (575)		 252.eon 32 102    471     32 84.0  575    
253.perlbmk base result bar (332)
253.perlbmk peak result bar (414)		 253.perlbmk 32 201    332     32 161    414    
254.gap base result bar (109)
254.gap peak result bar (109)		 254.gap 32 375    109     32 374    109    
255.vortex base result bar (330)
255.vortex peak result bar (360)		 255.vortex 32 213    330     32 196    360    
256.bzip2 base result bar (300)
256.bzip2 peak result bar (300)		 256.bzip2 32 186    300     32 186    300    
300.twolf base result bar (540)
300.twolf peak result bar (550)		 300.twolf 32 206    540     32 202    550    
  SPECint_rate_base2000 290      
  SPECint_rate2000 310    

Hardware
Hardware Vendor: Unisys Corporation
Model Name: Unisys ES7000 ORION 540 (3.0GHz Xeon MP)
CPU: Intel Xeon MP (400MHz system bus)
CPU MHz: 3000
FPU: Integrated
CPU(s) enabled: 32 cores, 32 chips, 1 core/chip(HT Technology disabled)
CPU(s) orderable: 16,20,24,28,32
Parallel: No
Primary Cache: 12K(I) micro-ops+8KBD on chip
Secondary Cache: 512KB(I+D) on chip
L3 Cache: 4096KB(I+D) on chip
Other Cache: 32MB L4 Cache off chip per 4 CPUs
Memory: 8GB
Disk Subsystem: 2X36GB SCSI RAID0 DISKs (15K rpm each)
Other Hardware:
Software
Operating System: MS Windows 2003 Datacenter Edition Build 3790
Compiler: Intel C++ Compiler 7.1 Build 20031229Z
Microsoft .NET Visual 7.0.9466 (for libraries)
SmartHeap Library Version 7.1
File System: NTFS
System State: Default
Notes / Tuning Information 
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 Base tuning for C programs  : -Qxi -Qipo -Qfp_port
 Base tuning for C++ programs: -QxW -Qipo -GX -GR
 Portability flags:
 176.gcc: -Dalloca=_alloca /F10000000
 186.crafy: -DNT_i386
 253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
 254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
 164.gzip:     -QxW -Qipo -Oa -Oi- +FDO 
 175.vpr:      -QxW -Qipo     -O3  +FDO 
 176.gcc:      basepeak=yes
 181.mcf:      -QxW -Qipo     -O3 +FDO
 186.crafty:   -QxW -Qipo -Oa -O3 +FDO  
 197.parser:   -QxW -Qipo     -O3 +FDO
 252.eon:      -QxW -Qipo     -O3 +FDO
 253.perlbmk:  -QxW -Qipo     -O3 +FDO shlW32M.lib
 254.gap:      basepeak=yes
 255.vortex    -QxW -Qipo     -O3 +FDO 
 256.bzip2:    basepeak=yes
 300.twolf:    -QxW -Qipo     -O3 +FDO shlW32M.lib

 Enabled two user settings in the BIOS :
 1."Adjacent Sector Prefetch"
 2."Prefetch Queue"
 HT Technology disabled through Unisys Sentinel System Management Product

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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 04-May-2004

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