SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
Hewlett-Packard Company
ProLiant BL685c (AMD Opteron (TM) 8218)
SPECint_rate2000 = 162    
SPECint_rate_base2000 = 150    
SPEC license # 3 Tested by: Hewlett-Packard Company Test date: Aug-2006 Hardware Avail: Nov-2006 Software Avail: Apr-2006
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (131)
164.gzip peak result bar (131)		 164.gzip 8 99.2  131     8 99.2  131    
175.vpr base result bar (120)
175.vpr peak result bar (122)		 175.vpr 8 108    120     8 107    122    
176.gcc base result bar (169)
176.gcc peak result bar (165)		 176.gcc 8 60.5  169     8 62.0  165    
181.mcf base result bar (81.2)
181.mcf peak result bar (96.4)		 181.mcf 8 206    81.2   8 173    96.4  
186.crafty base result bar (159)
186.crafty peak result bar (178)		 186.crafty 8 58.5  159     8 52.3  178    
197.parser base result bar (143)
197.parser peak result bar (142)		 197.parser 8 116    143     8 118    142    
252.eon base result bar (232)
252.eon peak result bar (304)		 252.eon 8 52.0  232     8 39.7  304    
253.perlbmk base result bar (169)
253.perlbmk peak result bar (169)		 253.perlbmk 8 98.6  169     8 98.6  169    
254.gap base result bar (163)
254.gap peak result bar (163)		 254.gap 8 62.8  163     8 62.8  163    
255.vortex base result bar (228)
255.vortex peak result bar (253)		 255.vortex 8 77.3  228     8 69.7  253    
256.bzip2 base result bar (116)
256.bzip2 peak result bar (121)		 256.bzip2 8 120    116     8 115    121    
300.twolf base result bar (156)
300.twolf peak result bar (197)		 300.twolf 8 179    156     8 141    197    
  SPECint_rate_base2000 150      
  SPECint_rate2000 162    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: ProLiant BL685c (AMD Opteron (TM) 8218)
CPU: AMD Opteron (TM) 8218
CPU MHz: 2600
FPU: Integrated
CPU(s) enabled: 8 cores, 4 chips, 2 cores/chip
CPU(s) orderable: 2,4 chips
Parallel: No
Primary Cache: 64 KB I + 64 KB D on chip per core
Secondary Cache: 1 MB I+D on chip per core
L3 Cache: N/A
Other Cache: N/A
Memory: 32 GB (16x2 GB PC2-5300P CL5.0)
Disk Subsystem: 1x36 GB 10 K SAS
Other Hardware:
Software
Operating System: Windows Server 2003 Enterprise SP1
Compiler: Intel C++ Compiler for 32-bit applications,
(version 9.1 Build 20060323Z)
Microsoft Visual Studio .NET 7.0.9466 (for libraries)
MicroQuill Smartheap Library 7.0
File System: NTFS
System State: Default
Notes / Tuning Information 
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 Base tuning for C programs:   -fast -arch:SSE2 -Oi- +FDO ONESTEP=yes
 Base tuning for C++ programs: -fast -Qcxx_features -arch:SSE2 +FDO ONESTEP=yes
 Portability flags:
   176.gcc:     -Dalloca=_alloca /F10000000 
   186.crafty:  -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap:     -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
   164.gzip:    basepeak=yes
   175.vpr:     -fast -arch:SSE2 -Qoption,c,-ip_ninl_max_stats=2000 
                -Qoption,c,-ip_ninl_max_total_stats=4500 +FDO ONESTEP=yes
   176.gcc:     -fast -arch:SSE2 -Oi- -Qunroll3          +FDO
   181.mcf:     -O3 -Qipo -QaxN                          +FDO ONESTEP=yes shlw32M.lib
   186.crafty:  -fast -arch:SSE2                         +FDO ONESTEP=yes
   197.parser:  -arch:SSE2 -Oi- -Qipo                    +FDO ONESTEP=yes
   252.eon:     -fast -arch:SSE2 -Qansi_alias -Qoption,c,-ip_ninl_max_stats=2000 
                -Qoption,c,-ip_ninl_max_total_stats=4500 +FDO ONESTEP=yes
   253.perlbmk: basepeak=yes
   254.gap:     basepeak=yes 
   255.vortex:  -fast -arch:SSE2 -Oi- -Qoption,c,-ip_ninl_max_stats=2000 
                -Qoption,c,-ip_ninl_max_total_stats=4500 +FDO ONESTEP=yes shlw32M.lib 
   256.bzip2:   -O3 -Qipo -QaxN  -Qunroll2                                shlw32M.lib
   300.twolf:   -fast -arch:SSE2 -Qansi_alias            +FDO ONESTEP=yes shlw32M.lib 
 BIOS Configuration Notes
   Node Interleaving Disabled
 Other Configuration Notes
   The start /b /wait /affinity command is used to bind CPU(s) to processes.

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Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 31-Oct-2006

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