SPEC CINT2000 Summary IBM Corporation IBM System X 3800 (3.0 GHz Xeon 7120N) Mon Jan 8 01:08:20 2007 SPEC License #11 Test date: Jan-2007 Hardware availability: Oct-2006 Tester: IBM Corporation Software availability: Mar-2006 Base Base Base Peak Peak Peak Benchmarks Ref Time Run Time Ratio Ref Time Run Time Ratio ------------ -------- -------- -------- -------- -------- -------- 164.gzip 1400 137 1019 164.gzip 1400 137 1019 164.gzip 1400 137 1019* 175.vpr 1400 142 983 175.vpr 1400 142 984* 175.vpr 1400 142 985 176.gcc 1100 65.2 1686 176.gcc 1100 65.0 1691* 176.gcc 1100 65.0 1692 181.mcf 1800 108 1666* 181.mcf 1800 108 1666 181.mcf 1800 108 1668 186.crafty 1000 88.3 1133 186.crafty 1000 88.2 1134 186.crafty 1000 88.2 1133* 197.parser 1800 152 1186* 197.parser 1800 152 1185 197.parser 1800 152 1186 252.eon 1300 63.6 2044 252.eon 1300 63.6 2045* 252.eon 1300 63.5 2046 253.perlbmk 1800 100 1799* 253.perlbmk 1800 100 1797 253.perlbmk 1800 100.0 1801 254.gap 1100 70.9 1552 254.gap 1100 70.8 1553* 254.gap 1100 70.8 1554 255.vortex 1900 76.9 2471 255.vortex 1900 76.9 2472 255.vortex 1900 76.9 2472* 256.bzip2 1500 129 1160* 256.bzip2 1500 129 1160 256.bzip2 1500 129 1160 300.twolf 3000 197 1522 300.twolf 3000 196 1531 300.twolf 3000 196 1530* ======================================================================== 164.gzip 1400 137 1019* 175.vpr 1400 142 984* 176.gcc 1100 65.0 1691* 181.mcf 1800 108 1666* 186.crafty 1000 88.2 1133* 197.parser 1800 152 1186* 252.eon 1300 63.6 2045* 253.perlbmk 1800 100 1799* 254.gap 1100 70.8 1553* 255.vortex 1900 76.9 2472* 256.bzip2 1500 129 1160* 300.twolf 3000 196 1530* SPECint_base2000 1462 SPECint2000 -- HARDWARE -------- Hardware Vendor: IBM Corporation Model Name: IBM System X 3800 (3.0 GHz Xeon 7120N) CPU: Intel Xeon processor 7120N ( 3.00 GHz, 667 MHz bus) CPU MHz: 3000 FPU: Integrated CPU(s) enabled: 8 cores, 4 chips, 2 cores/chip (Hyper-Threading Technology enabled) CPU(s) orderable: 1, 2, 4 chips Parallel: No Primary Cache: 12 K I micro-ops + 16 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 4 MB on chip per chip Other Cache: N/A Memory: 16 x 2048 MB ECC PC2-3200 Disk Subsystem: 73GB SAS 15K RPM Other Hardware: SOFTWARE -------- Operating System: Microsoft Windows Server 2003 Enterprise x64 Edition + SP1 (64-bit) Compiler: Intel C++ Compiler 9.1 for 32-bit applications Build 20060323Z Package ID: W_CC_P_9.1.020 Microsoft Visual Studio 2005(for libraries) SmartHeap Library Version 8.0 from http://www.microquill.com/ File System: NTFS System State: Default NOTES ----- +FDO: PASS1=-Qprof_gen PASS2=-Qprof_use Base tuning for C programs: -fast +FDO shlW32M-80.lib Base tuning for C++ programs: -fast -Qcxx_features +FDO shlW32M-80.lib Portability flags: 176.gcc: -Dalloca=_alloca /F10000000 186.crafy: -DNT_i386 252.eon: -DHAS_ERRLIST 253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT 254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO Bios Settings Hardware Prefetch enabled Memory Array set to High-Performance Memory Array ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 1999-2007 Standard Performance Evaluation Corporation Generated on Tue Feb 6 18:22:00 2007 by SPEC CPU2000 ASCII formatter v2.1