SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2007 Standard Performance Evaluation Corporation
Hewlett-Packard Company
ProLiant BL480c (2.66 GHz, Intel Xeon processor X5355)
SPECint_rate2000 = 199    
SPECint_rate_base2000 = 198    
SPEC license # 3 Tested by: Hewlett-Packard Company Test date: Jan-2007 Hardware Avail: Jan-2007 Software Avail: Nov-2006
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (145)
164.gzip peak result bar (145)
164.gzip 8 89.4  145     8 89.5  145    
175.vpr base result bar (142)
175.vpr peak result bar (144)
175.vpr 8 91.3  142     8 90.0  144    
176.gcc base result bar (177)
176.gcc peak result bar (177)
176.gcc 8 57.8  177     8 57.8  177    
181.mcf base result bar (137)
181.mcf peak result bar (140)
181.mcf 8 122    137     8 119    140    
186.crafty base result bar (225)
186.crafty peak result bar (224)
186.crafty 8 41.3  225     8 41.3  224    
197.parser base result bar (176)
197.parser peak result bar (176)
197.parser 8 95.0  176     8 94.8  176    
252.eon base result bar (320)
252.eon peak result bar (320)
252.eon 8 37.7  320     8 37.7  320    
253.perlbmk base result bar (277)
253.perlbmk peak result bar (282)
253.perlbmk 8 60.3  277     8 59.3  282    
254.gap base result bar (145)
254.gap peak result bar (146)
254.gap 8 70.3  145     8 69.9  146    
255.vortex base result bar (340)
255.vortex peak result bar (340)
255.vortex 8 51.8  340     8 51.9  340    
256.bzip2 base result bar (148)
256.bzip2 peak result bar (148)
256.bzip2 8 94.1  148     8 94.1  148    
300.twolf base result bar (286)
300.twolf peak result bar (286)
300.twolf 8 97.2  286     8 97.2  286    
  SPECint_rate_base2000 198      
  SPECint_rate2000 199    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: ProLiant BL480c (2.66 GHz, Intel Xeon processor X5355)
CPU: Intel Xeon processor X5355 (2.66 GHz, 2x4 MB L2 shared, 1333 MHz bus)
CPU MHz: 2666
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip
CPU(s) orderable: 1,2 chips
Parallel: No
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 8 MB I+D on chip per chip (4 MB shared per 2 cores)
L3 Cache: N/A
Other Cache: N/A
Memory: 16 GB (8x2 GB PC2-5300F CL5)
Disk Subsystem: 1x72 GB 10 K SAS
Other Hardware:
Software
Operating System: Windows Server 2003 Enterprise X64 Edition (x86_64) SP1
Compiler: Intel C++ Compiler for 32-bit applications,
(Version 9.1 Build 20061103Z)
Microsoft Visual Studio .NET 2003 (v7.1.3088, for libraries)
MicroQuill Smartheap Library 8.0
File System: NTFS
System State: Default
Notes / Tuning Information
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 Base tuning for C programs:   -fast         +FDO  ONESTEP=yes shlw32M.lib
 Base tuning for C++ programs: -fast -Qcxx_features +FDO  ONESTEP=yes
 Portability flags:
   176.gcc: -Dalloca=_alloca /F10000000 
   186.crafty: -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
   164.gzip:     -fast               +FDO  ONESTEP=yes 
   175.vpr:      -fast               +FDO  ONESTEP=yes
   176.gcc:      basepeak=1
   181.mcf:      -fast               +FDO  
   186.crafty:   -fast -Oa           +FDO  ONESTEP=yes shlw32M.lib 
   197.parser:   -fast               +FDO  ONESTEP=yes
   252.eon:      -fast               +FDO
   253.perlbmk:  -fast -Oa           +FDO  ONESTEP=yes shlw32M.lib
   254.gap:      -fast               +FDO  ONESTEP=yes
   255.vortex:   -fast               +FDO  ONESTEP=yes shlw32M.lib
   256.bzip2:    basepeak=1
   300.twolf:    -fast               +FDO              shlw32M.lib
 BIOS Configuration Notes
   Power Regulator set to Static High Performance Mode
   Adjacent Sector Prefetch disabled
 Other Configuration Notes
   The start /b /wait /affinity command is used to bind CPU(s) to processes.


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Copyright © 1999-2007 Standard Performance Evaluation Corporation

First published at SPEC.org on 20-Feb-2007

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