SPEC(R) CINT2006 Summary IBM Corporation IBM System x3250 (Intel Xeon X3210) Thu Jan 4 14:43:40 2007 CPU2006 License: 11 Test date: Jan-2007 Test sponsor: IBM Corporation Hardware availability: Feb-2007 Tested by: IBM Corporation Software availability: Aug-2006 Base Base Base Peak Peak Peak Benchmarks Ref. Run Time Ratio Ref. Run Time Ratio -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 9770 618 15.8 * 400.perlbench 9770 618 15.8 S 400.perlbench 9770 617 15.8 S 401.bzip2 9650 823 11.7 S 401.bzip2 9650 823 11.7 * 401.bzip2 9650 822 11.7 S 403.gcc 8050 750 10.7 S 403.gcc 8050 749 10.7 S 403.gcc 8050 750 10.7 * 429.mcf 9120 471 19.4 S 429.mcf 9120 469 19.4 S 429.mcf 9120 470 19.4 * 445.gobmk 10490 745 14.1 S 445.gobmk 10490 744 14.1 * 445.gobmk 10490 744 14.1 S 456.hmmer 9330 1033 9.03 * 456.hmmer 9330 1033 9.03 S 456.hmmer 9330 1033 9.03 S 458.sjeng 12100 908 13.3 S 458.sjeng 12100 907 13.3 S 458.sjeng 12100 908 13.3 * 462.libquantum 20720 1459 14.2 S 462.libquantum 20720 1448 14.3 * 462.libquantum 20720 1448 14.3 S 464.h264ref 22130 982 22.5 * 464.h264ref 22130 983 22.5 S 464.h264ref 22130 982 22.5 S 471.omnetpp 6250 514 12.2 S 471.omnetpp 6250 513 12.2 * 471.omnetpp 6250 512 12.2 S 473.astar 7020 655 10.7 S 473.astar 7020 654 10.7 * 473.astar 7020 654 10.7 S 483.xalancbmk 6900 404 17.1 S 483.xalancbmk 6900 403 17.1 S 483.xalancbmk 6900 403 17.1 * ============================================================================== 400.perlbench 9770 618 15.8 * 401.bzip2 9650 823 11.7 * 403.gcc 8050 750 10.7 * 429.mcf 9120 470 19.4 * 445.gobmk 10490 744 14.1 * 456.hmmer 9330 1033 9.03 * 458.sjeng 12100 908 13.3 * 462.libquantum 20720 1448 14.3 * 464.h264ref 22130 982 22.5 * 471.omnetpp 6250 513 12.2 * 473.astar 7020 654 10.7 * 483.xalancbmk 6900 403 17.1 * SPECint(R)_base2006 13.8 SPECint2006 Not Run HARDWARE -------- CPU Name: Intel Xeon X3210 CPU Characteristics: 1066MHz system bus CPU MHz: 2133 FPU: Integrated CPU(s) enabled: 4 cores, 1 chip, 4 cores/chip CPU(s) orderable: 1 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 8 MB I+D on chip per chip, 4 MB shared / 2 cores L3 Cache: None Other Cache: None Memory: 8 GB (4 x 2GB PC2-5300 ECC) Disk Subsystem: 1 x 73 GB SAS, 10000 RPM Other Hardware: None SOFTWARE -------- Operating System: Microsoft Windows Server 2003 Enterprise x64 Edition + SP1 (64-bit) Compiler: Intel C++ Compiler for IA32 version 9.1 Build no 20060816 Microsoft Visual Studio .Net 2003 (for libraries) Auto Parallel: No File System: NTFS System State: Default Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: Smart Heap Library, Version 8 Base Compiler Invocation ------------------------ C benchmarks: icl -Qvc7.1 -Qc99 C++ benchmarks: icl -Qvc7.1 Base Portability Flags ---------------------- 403.gcc: -DSPEC_CPU_WIN32 464.h264ref: -DSPEC_CPU_NO_INTTYPES -DWIN32 Base Optimization Flags ----------------------- C benchmarks: -fast /F512000000 shlw32m.lib -link /FORCE:MULTIPLE C++ benchmarks: -fast -Qcxx_features /F512000000 shlw32m.lib -link /FORCE:MULTIPLE Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic91-flags.20090714.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic91-flags.20090714.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.0. Report generated on Tue Jul 22 10:16:05 2014 by CPU2006 ASCII formatter v6932. Originally published on 6 February 2007.