SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco B200-M1 (Intel Xeon L5520 2.26 GHz)

CPU2006 license: 9019 Test date: May-2009
Test sponsor: Cisco Systems Hardware Availability: May-2009
Tested by: Cisco Systems Software Availability: May-2009
Benchmark results graph
Hardware
CPU Name: Intel Xeon L5520
CPU Characteristics: Intel Turbo Boost Technology up to 2.53 GHz
CPU MHz: 2267
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core
CPU(s) orderable: 1, 2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 8 MB I+D on chip per chip
Other Cache: None
Memory: 24 GB (12 x 2GB DDR3 1066 MHz)
Disk Subsystem: 73 GB SAS ST973451SS, 15000 RPM
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 11 (x86_64),
Kernel 2.6.27.19-5-default
Compiler: Intel C++ Compiler 11.0 for Linux
Build 20090131 Package ID: l_cproc_p_11.0.080
Auto Parallel: No
File System: ext3
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V8.1

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 16 921 170 929 168 916 171 16 793 197 798 196 787 199
401.bzip2 16 1272 121 1264 122 1266 122 16 1204 128 1192 129 1190 130
403.gcc 16 803 160 812 159 817 158 16 815 158 811 159 805 160
429.mcf 16 648 225 648 225 648 225 8 324 225 324 225 323 226
445.gobmk 16 903 186 904 186 907 185 16 818 205 823 204 822 204
456.hmmer 16 1083 138 1086 137 1084 138 8 408 183 417 179 420 178
458.sjeng 16 1116 173 1116 173 1115 174 16 1010 192 1008 192 1009 192
462.libquantum 16 532 623 533 622 532 624 16 532 623 532 623 531 624
464.h264ref 16 1460 243 1560 227 1563 227 16 1400 253 1445 245 1424 249
471.omnetpp 16 685 146 687 146 686 146 16 685 146 687 146 686 146
473.astar 16 924 122 920 122 926 121 16 827 136 827 136 827 136
483.xalancbmk 16 519 213 520 212 520 212 16 519 213 520 212 520 212

Submit Notes

The config file option 'submit' was used.
 numactl --localalloc --physcpubind=$BIND was used to bind copies to the cores
 using following bind list:
 bind =  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15

Operating System Notes

 ulimit -s unlimited was used to set the stack size

General Notes


Submitted_by: "Ven Immani (immaniv)" <immaniv@cisco.com>
Submitted: Wed Jun 10 17:31:06 EDT 2009
Submission: cpu2006-20090601-07564.sub

Submitted_by: "Ven Immani (immaniv)" <immaniv@cisco.com>
Submitted: Wed Jun 10 17:38:43 EDT 2009
Submission: cpu2006-20090601-07564.sub

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -inline-calloc   -opt-malloc-options=3   -opt-prefetch 

C++ benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -Wl,-z,muldefs   -L/spec/cpu2006.1.1/lib -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc 
401.bzip2:  /opt/intel/Compiler/11.0/080/bin/intel64/icc 
456.hmmer:  /opt/intel/Compiler/11.0/080/bin/intel64/icc 
458.sjeng:  /opt/intel/Compiler/11.0/080/bin/intel64/icc 

C++ benchmarks (except as noted below):

 icpc 
473.astar:  /opt/intel/Compiler/11.0/080/bin/intel64/icpc 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
458.sjeng:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LINUX 
473.astar:  -DSPEC_CPU_LP64 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-prefetch 
401.bzip2:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -opt-prefetch   -ansi-alias   -auto-ilp32 
403.gcc:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -inline-calloc   -opt-malloc-options=3 
429.mcf:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -opt-prefetch 
445.gobmk:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -prof-use(pass 2)   -O2   -ipo   -no-prec-div   -ansi-alias 
456.hmmer:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -unroll2   -ansi-alias   -auto-ilp32 
458.sjeng:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  -xSSE4.2   -ipo   -O3   -no-prec-div   -static   -opt-malloc-options=3   -opt-prefetch 
464.h264ref:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -static(pass 2)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  basepeak = yes 
473.astar:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=routine   -auto-ilp32   -Wl,-z,muldefs   -L/spec/cpu2006.1.1/lib -lsmartheap64 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090710.15.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090710.15.xml.