SPEC(R) CINT2006 Summary ScaleMP vSMP Foundation (Intel Xeon X5570, see notes) Tue May 12 10:55:27 2009 CPU2006 License: 2929 Test date: Apr-2009 Test sponsor: ScaleMP Hardware availability: Apr-2009 Tested by: ScaleMP Software availability: Apr-2009 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 64 951 657 S 400.perlbench 64 786 795 S 400.perlbench 64 787 795 * 401.bzip2 64 1158 533 S 401.bzip2 64 1083 570 * 401.bzip2 64 1082 571 S 403.gcc 64 690 746 S 403.gcc 64 691 745 * 403.gcc 64 696 740 S 429.mcf 64 591 988 S 429.mcf 64 589 992 * 429.mcf 64 587 994 S 445.gobmk 64 760 883 S 445.gobmk 64 756 888 S 445.gobmk 64 757 887 * 456.hmmer 64 939 636 S 456.hmmer 64 897 666 * 456.hmmer 64 895 667 S 458.sjeng 64 931 832 S 458.sjeng 64 931 832 * 458.sjeng 64 931 832 S 462.libquantum 64 492 2700 * 462.libquantum 64 492 2700 S 462.libquantum 64 490 2710 S 464.h264ref 64 1224 1160 S 464.h264ref 64 1241 1140 * 464.h264ref 64 1258 1130 S 471.omnetpp 64 718 557 S 471.omnetpp 64 721 555 * 471.omnetpp 64 721 555 S 473.astar 64 876 513 S 473.astar 64 875 513 * 473.astar 64 875 514 S 483.xalancbmk 64 740 597 S 483.xalancbmk 64 596 741 * 483.xalancbmk 64 591 748 S ============================================================================== 400.perlbench 64 787 795 * 401.bzip2 64 1083 570 * 403.gcc 64 691 745 * 429.mcf 64 589 992 * 445.gobmk 64 757 887 * 456.hmmer 64 897 666 * 458.sjeng 64 931 832 * 462.libquantum 64 492 2700 * 464.h264ref 64 1241 1140 * 471.omnetpp 64 721 555 * 473.astar 64 875 513 * 483.xalancbmk 64 596 741 * SPECint(R)_rate_base2006 830 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon X5570 CPU Characteristics: Intel Turbo Boost Technology is not-enabled CPU MHz: 2933 FPU: Integrated CPU(s) enabled: 32 cores, 8 chips, 4 cores/chip, 2 threads/core CPU(s) orderable: 4,6,8,10,12,14,16,18,20,22,24,26,28,30,32 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 8 MB I+D on chip per chip Other Cache: 6 GB I+D off chip per entire system (see notes) Memory: 96 GB (4 x 12 x 2 GB DDR3-1333R, ECC, CL9) Disk Subsystem: 4 x 1 x 500 GB SATA, 7200 RPM Other Hardware: InfiniBand SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 5.3 (Tikanga) Kernel: 2.6.27.19-1.vSMP Compiler: Intel C Compiler for applications running on IA-32, Version 11.0.074 Intel Fortran Compiler for applications running on IA-32, Version 11.0.074 Auto Parallel: No File System: xfs System State: Multi-user, run level 3 Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: ScaleMP vSMP Foundation 2.0.44.0 Submit Notes ------------ The config file option 'submit' was used with taskset to bind processes to cores Platform Notes -------------- ScaleMP vSMP Foundation: 2.0.44.0 Other Cache: ScaleMP vSMP Foundation manages cache coherency between the InfiniBand-connected systems via multiple concurrent memory coherency mechanisms, on a per-block basis, based on real-time memory activity access patterns. This mechanism reserves 6 GB of the main memory across all boards (distributed), which is used as a 4th level cache. Hardware Details: System was aggregated using 4 X SuperMicro SuperServer 6026T-NTR+. The servers were connected with Melanox InfiniBand QDR and a QDR switch. CPU Characteristics: Intel Turbo Boost Technology not-enabled: As the prerequisites listed below for enablement of this technology did not exist. The prerequisites for Turbo Boost Technology are: - Hardware: Enabling Turbo Boost Technology require BIOS setting. - Software: OS needs to be ACPI-aware and set P0 power state. Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -inline-calloc -opt-malloc-options=3 -opt-prefetch C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags file that was used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revE.20090925.html You can also download the XML flags source by saving the following link: http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revE.20090925.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.1. Report generated on Wed Jul 23 03:24:20 2014 by CPU2006 ASCII formatter v6932. Originally published on 25 September 2009.