SPEC® CINT2006 Result

Copyright 2006-2016 Standard Performance Evaluation Corporation

Lenovo Group Limited

Lenovo ThinkServer TD350
(2.10 GHz, Intel Xeon E5-2695 v4)

CPU2006 license: 9017 Test date: Sep-2016
Test sponsor: Lenovo Group Limited Hardware Availability: Mar-2016
Tested by: Lenovo Group Limited Software Availability: Mar-2016
Benchmark results graph
Hardware
CPU Name: Intel Xeon E5-2695 v4
CPU Characteristics: Intel Turbo Boost Technology up to 3.30 GHz
CPU MHz: 2100
FPU: Integrated
CPU(s) enabled: 36 cores, 2 chips, 18 cores/chip, 2 threads/core
CPU(s) orderable: 1,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 45 MB I+D on chip per chip
Other Cache: None
Memory: 256 GB (16 x 16 GB 2Rx4 PC4-2400T-R)
Disk Subsystem: 1 x 800 GB SATA SSD
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 12 SP1 (x86_64)
Kernel 3.12.49-11-default
Compiler: C/C++: Version 16.0.2.181 of Intel C++ Studio XE
for Linux
Auto Parallel: No
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V10.2

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 72 648 1090 646 1090 645 1090 72 524 1340 521 1350 524 1340
401.bzip2 72 980 709 978 710 981 708 72 946 734 943 736 946 735
403.gcc 72 549 1060 549 1050 548 1060 72 551 1050 551 1050 551 1050
429.mcf 72 352 1870 351 1870 351 1870 72 352 1870 351 1870 351 1870
445.gobmk 72 805 938 806 937 804 939 72 761 992 761 993 763 990
456.hmmer 72 348 1930 349 1930 349 1930 72 316 2120 315 2130 318 2110
458.sjeng 72 845 1030 844 1030 846 1030 72 806 1080 807 1080 807 1080
462.libquantum 72 103 14500 103 14500 103 14500 72 103 14500 103 14500 103 14500
464.h264ref 72 955 1670 939 1700 961 1660 72 913 1750 918 1740 912 1750
471.omnetpp 72 628 716 628 717 628 716 72 606 743 607 742 606 742
473.astar 72 634 798 634 797 632 799 72 634 798 634 797 632 799
483.xalancbmk 72 329 1510 329 1510 332 1500 72 329 1510 329 1510 332 1500

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"
 Transparent Huge Pages enabled with:
  echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
  echo 1 > /proc/sys/vm/drop_caches

Platform Notes

BIOS Configuration:
 Cluster On Die set to Enabled
 Early Snoop set to Disabled
 Performance Profile set to Custom
 C1E Support set to Disabled
 Core C3 set to Disabled
 Core C6 set to Disabled
 Thermal Profile set to Max Performance
 Memory Power Savings set to Disabled
 Sysinfo program /home/cpu2006-1.2-ic16.0/config/sysinfo.rev6914
 $Rev: 6914 $ $Date:: 2014-06-25 #$ e3fbb8667b5a285932ceab81e28219e1
 running on TD350-01 Wed Sep  7 17:02:25 2016

 This section contains SUT (System Under Test) info as seen by
 some common utilities.  To remove or add to this section, see:
   http://www.spec.org/cpu2006/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E5-2695 v4 @ 2.10GHz
       2 "physical id"s (chips)
       72 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 18
       siblings  : 36
       physical 0: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27
       physical 1: cores 0 1 2 3 4 8 9 10 11 16 17 18 19 20 24 25 26 27
    cache size : 23040 KB

 From /proc/meminfo
    MemTotal:       264552668 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 1
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP1"
       VERSION_ID="12.1"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP1"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp1"

 uname -a:
    Linux TD350-01 3.12.49-11-default #1 SMP Wed Nov 11 20:52:43 UTC 2015
    (8d714a0) x86_64 x86_64 x86_64 GNU/Linux

 run-level 3 Sep 7 17:00

 SPEC is set to: /home/cpu2006-1.2-ic16.0
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda4      xfs   689G  107G  582G  16% /home
 Additional information from dmidecode:

    Warning: Use caution when you interpret this section. The 'dmidecode' program
    reads system data which is "intended to allow hardware to be accurately
    determined", but the intent may not be met, as there are frequent changes to
    hardware, firmware, and the "DMTF SMBIOS" standard.

   BIOS LENOVO TB5TS362 03/24/2016
   Memory:
    16x Hynix Semiconductor HMA42GR7AFR4N-UH 16 GB 2 rank 2400 MHz

 (End of data from sysinfo program)

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2006-1.2-ic16.0/libs/32:/home/cpu2006-1.2-ic16.0/libs/64:/home/cpu2006-1.2-ic16.0/sh"

 Binaries compiled on a system with 1x Intel Core i7-4790K CPU + 32GB
 memory using RedHat EL 7.2 glibc 2.17
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 

C++ benchmarks:

 icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 

Base Portability Flags

400.perlbench:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -D_FILE_OFFSET_BITS=64 
403.gcc:  -D_FILE_OFFSET_BITS=64 
429.mcf:  -D_FILE_OFFSET_BITS=64 
445.gobmk:  -D_FILE_OFFSET_BITS=64 
456.hmmer:  -D_FILE_OFFSET_BITS=64 
458.sjeng:  -D_FILE_OFFSET_BITS=64 
462.libquantum:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 
464.h264ref:  -D_FILE_OFFSET_BITS=64 
471.omnetpp:  -D_FILE_OFFSET_BITS=64 
473.astar:  -D_FILE_OFFSET_BITS=64 
483.xalancbmk:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3   -Wl,-z,muldefs   -L/sh -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 
400.perlbench:  icc -m64 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 

C++ benchmarks:

 icpc -m32 -L/opt/intel/compilers_and_libraries_2016/linux/compiler/lib/ia32_lin 

Peak Portability Flags

400.perlbench:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX_X64 
401.bzip2:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64 
403.gcc:  -D_FILE_OFFSET_BITS=64 
429.mcf:  -D_FILE_OFFSET_BITS=64 
445.gobmk:  -D_FILE_OFFSET_BITS=64 
456.hmmer:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64 
458.sjeng:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LP64 
462.libquantum:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 
464.h264ref:  -D_FILE_OFFSET_BITS=64 
471.omnetpp:  -D_FILE_OFFSET_BITS=64 
473.astar:  -D_FILE_OFFSET_BITS=64 
483.xalancbmk:  -D_FILE_OFFSET_BITS=64   -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -auto-ilp32 
401.bzip2:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32   -ansi-alias 
403.gcc:  -xCORE-AVX2   -ipo   -O3   -no-prec-div 
429.mcf:  basepeak = yes 
445.gobmk:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -prof-use(pass 2)   -par-num-threads=1(pass 1)   -ansi-alias   -opt-mem-layout-trans=3 
456.hmmer:  -xCORE-AVX2   -ipo   -O3   -no-prec-div   -unroll2   -auto-ilp32 
458.sjeng:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  basepeak = yes 
464.h264ref:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -xCORE-AVX2(pass 2)   -prof-gen:threadsafe(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -par-num-threads=1(pass 1)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/sh -lsmartheap 
473.astar:  basepeak = yes 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.html,
http://www.spec.org/cpu2006/flags/Lenovo-Platform-Settings-V1.2-BDW-revC.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic16.0-official-linux64.xml,
http://www.spec.org/cpu2006/flags/Lenovo-Platform-Settings-V1.2-BDW-revC.xml.

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For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2016 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.2.
Report generated on Tue Oct 4 14:49:57 2016 by SPEC CPU2006 HTML formatter v6932.
Originally published on 4 October 2016.