SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS C220 M5 (Intel Xeon Gold 6144, 3.50GHz) Fri Aug 11 13:04:12 2017 CPU2006 License: 9019 Test date: Aug-2017 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Apr-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 32 391 799 S 32 313 998 * 400.perlbench 32 389 804 S 32 314 995 S 400.perlbench 32 389 804 * 32 313 999 S 401.bzip2 32 612 505 S 32 584 529 * 401.bzip2 32 616 502 S 32 585 528 S 401.bzip2 32 614 503 * 32 582 530 S 403.gcc 32 314 820 S 32 311 828 * 403.gcc 32 312 827 * 32 311 829 S 403.gcc 32 311 828 S 32 312 826 S 429.mcf 32 184 1590 * 32 184 1590 * 429.mcf 32 184 1580 S 32 184 1580 S 429.mcf 32 183 1590 S 32 183 1590 S 445.gobmk 32 539 622 S 32 542 620 * 445.gobmk 32 539 623 S 32 541 620 S 445.gobmk 32 539 623 * 32 542 619 S 456.hmmer 32 184 1620 S 32 142 2100 S 456.hmmer 32 185 1620 S 32 142 2100 * 456.hmmer 32 185 1620 * 32 142 2100 S 458.sjeng 32 582 665 S 32 541 716 S 458.sjeng 32 584 664 S 32 541 716 * 458.sjeng 32 583 664 * 32 540 717 S 462.libquantum 32 37.4 17700 S 32 37.4 17700 S 462.libquantum 32 37.4 17700 * 32 37.4 17700 * 462.libquantum 32 37.5 17700 S 32 37.5 17700 S 464.h264ref 32 626 1130 S 32 608 1160 * 464.h264ref 32 628 1130 S 32 608 1170 S 464.h264ref 32 627 1130 * 32 610 1160 S 471.omnetpp 32 388 516 * 32 356 562 S 471.omnetpp 32 387 516 S 32 356 562 * 471.omnetpp 32 388 515 S 32 355 563 S 473.astar 32 344 654 S 32 344 654 S 473.astar 32 345 652 * 32 345 652 * 473.astar 32 345 651 S 32 345 651 S 483.xalancbmk 32 151 1460 S 32 151 1460 S 483.xalancbmk 32 150 1470 S 32 150 1470 S 483.xalancbmk 32 151 1470 * 32 151 1470 * ============================================================================== 400.perlbench 32 389 804 * 32 313 998 * 401.bzip2 32 614 503 * 32 584 529 * 403.gcc 32 312 827 * 32 311 828 * 429.mcf 32 184 1590 * 32 184 1590 * 445.gobmk 32 539 623 * 32 542 620 * 456.hmmer 32 185 1620 * 32 142 2100 * 458.sjeng 32 583 664 * 32 541 716 * 462.libquantum 32 37.4 17700 * 32 37.4 17700 * 464.h264ref 32 627 1130 * 32 608 1160 * 471.omnetpp 32 388 516 * 32 356 562 * 473.astar 32 345 652 * 32 345 652 * 483.xalancbmk 32 151 1470 * 32 151 1470 * SPECint(R)_rate_base2006 1110 SPECint_rate2006 1180 HARDWARE -------- CPU Name: Intel Xeon Gold 6144 CPU Characteristics: Intel Turbo Boost Technology up to 4.20 GHz CPU MHz: 3500 FPU: Integrated CPU(s) enabled: 16 cores, 2 chips, 8 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chips Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 24.75 MB I+D on chip per chip Other Cache: None Memory: 384 GB (24 x 16 GB 2Rx4 PC4-2666V-R) Disk Subsystem: 1 x 600 GB SSD SAS Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default Compiler: C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux Auto Parallel: Yes File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2006-1.2/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on linux-0fck Fri Aug 11 10:04:13 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6144 CPU @ 3.50GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 2 3 9 16 19 26 27 physical 1: cores 0 2 3 9 16 19 26 27 cache size : 25344 KB From /proc/meminfo MemTotal: 394864388 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-0fck 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Aug 11 09:59 SPEC is set to: /home/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 xfs 500G 39G 462G 8% / Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C220M5.3.1.1d.0.0615170645 06/15/2017 Memory: 24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006-1.2/lib/ia32:/home/cpu2006-1.2/lib/intel64:/home/cpu2006-1.2/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/transparent_hugepage/enabled Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -auto-ilp32 -qopt-mem-layout-trans=3 401.bzip2: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-prefetch -auto-ilp32 -qopt-mem-layout-trans=3 403.gcc: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 429.mcf: basepeak = yes 445.gobmk: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-mem-layout-trans=3 456.hmmer: -xCORE-AVX512 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 -qopt-mem-layout-trans=3 458.sjeng: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll4 -auto-ilp32 -qopt-mem-layout-trans=3 462.libquantum: basepeak = yes 464.h264ref: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -unroll2 -qopt-mem-layout-trans=3 C++ benchmarks: 471.omnetpp: -prof-gen(pass 1) -prof-use(pass 2) -xCORE-AVX512(pass 2) -par-num-threads=1(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -qopt-ra-region-strategy=block -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2017 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Sep 6 11:47:09 2017 by CPU2006 ASCII formatter v6932. Originally published on 5 September 2017.