SPEC(R) CINT2006 Summary Hewlett Packard Enterprise ProLiant DL385 Gen10 (2.00 GHz, AMD EPYC 7551) Test Sponsor: HPE Fri Dec 8 12:12:36 2017 CPU2006 License: 3 Test date: Dec-2017 Test sponsor: HPE Hardware availability: Nov-2017 Tested by: HPE Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 128 685 1820 * 400.perlbench 128 686 1820 S 400.perlbench 128 685 1830 S 401.bzip2 128 1031 1200 S 401.bzip2 128 1030 1200 * 401.bzip2 128 1028 1200 S 403.gcc 128 692 1490 S 403.gcc 128 679 1520 S 403.gcc 128 680 1520 * 429.mcf 128 647 1800 S 429.mcf 128 643 1810 * 429.mcf 128 642 1820 S 445.gobmk 128 783 1720 S 445.gobmk 128 783 1710 * 445.gobmk 128 783 1710 S 456.hmmer 128 350 3410 S 456.hmmer 128 352 3390 S 456.hmmer 128 351 3400 * 458.sjeng 128 974 1590 * 458.sjeng 128 972 1590 S 458.sjeng 128 978 1580 S 462.libquantum 128 128 20700 S 462.libquantum 128 128 20700 * 462.libquantum 128 128 20700 S 464.h264ref 128 1194 2370 * 464.h264ref 128 1196 2370 S 464.h264ref 128 1189 2380 S 471.omnetpp 128 705 1140 S 471.omnetpp 128 704 1140 S 471.omnetpp 128 704 1140 * 473.astar 128 707 1270 S 473.astar 128 709 1270 * 473.astar 128 709 1270 S 483.xalancbmk 128 404 2190 S 483.xalancbmk 128 402 2200 S 483.xalancbmk 128 403 2190 * ============================================================================== 400.perlbench 128 685 1820 * 401.bzip2 128 1030 1200 * 403.gcc 128 680 1520 * 429.mcf 128 643 1810 * 445.gobmk 128 783 1710 * 456.hmmer 128 351 3400 * 458.sjeng 128 974 1590 * 462.libquantum 128 128 20700 * 464.h264ref 128 1194 2370 * 471.omnetpp 128 704 1140 * 473.astar 128 709 1270 * 483.xalancbmk 128 403 2190 * SPECint(R)_rate_base2006 2130 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: AMD EPYC 7551 CPU Characteristics: AMD Turbo CORE technology up to 3.00 GHz CPU MHz: 2000 FPU: Integrated CPU(s) enabled: 64 cores, 2 chips, 32 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chip(s) Primary Cache: 64 KB I + 32 KB D on chip per core Secondary Cache: 512 KB I+D on chip per core L3 Cache: 64 MB I+D on chip per chip, 8 MB shared / 4 cores Other Cache: None Memory: 1 TB (16 x 64 GB 4Rx4 PC4-2666V-L) Disk Subsystem: 1 x 400 GB SAS SSD, RAID 0 Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) SP3 Kernel 4.4.73-5-default Compiler: C/C++: Version 4.5.2.1 of x86 Open64 Compiler Suite (from AMD) Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: Not Applicable Other Software: MicroQuill SmartHeap 10.0 32-bit Library for Linux Submit Notes ------------ The config file option 'submit' was used. 'numactl' was used to bind copies to the cores. See the configuration file for details. Operating System Notes ---------------------- Set vm/nr_hugepages=86016 in /etc/sysctl.conf mount -t hugetlbfs nodev /mnt/hugepages Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling Performance Determinism set to Power Deterministic Memory Patrol Scrubbing set to Disabled Workload Profile set to General Throughput Compute Minimum Processor Idle Power Core C-State set to C6 State Processor Power and Utilization Monitoring set to Disabled General Notes ------------- Environment variables set by runspec before the start of the run: HUGETLB_LIMIT = "896" LD_LIBRARY_PATH = "/home/cpu2006/amd1603-rate-libs-revB/32:/home/cpu2006/amd1603-rate-libs-revB/64" The binaries were built with the x86 Open64 Compiler Suite, which is only available from (and supported by) AMD at http://developer.amd.com/tools-and-sdks/cpu-development/x86-open64-compiler-suite/ Base Compiler Invocation ------------------------ C benchmarks: opencc C++ benchmarks: openCC Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 403.gcc: -DSPEC_CPU_LP64 429.mcf: -DSPEC_CPU_LP64 445.gobmk: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX 464.h264ref: -DSPEC_CPU_LP64 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -Ofast -CG:local_sched_alg=1 -INLINE:aggressive=ON -IPA:plimit=8000 -IPA:small_pu=100 -HP:bd=2m:heap=2m -mso -LNO:prefetch=2 -march=bdver1 -mno-fma4 -mno-xop -mno-tbm C++ benchmarks: -Ofast -m32 -INLINE:aggressive=on -CG:cmp_peep=on -D__OPEN64_FAST_SET -march=bdver1 -mno-fma4 -mno-xop -mno-tbm -L/root/work/libraries/SmartHeap-10/lib -lsmartheap The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/x86-openflags-rate-revA-I.html http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-AMD-V1.2-EPYC-revD.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/x86-openflags-rate-revA-I.xml http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-AMD-V1.2-EPYC-revD.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Tue Jan 16 12:10:02 2018 by CPU2006 ASCII formatter v6932. Originally published on 14 January 2018.