SPEC(R) CINT2006 Summary Hewlett Packard Enterprise ProLiant BL460c Gen10 (2.30 GHz, Intel Xeon Gold 5118) Test Sponsor: HPE Tue Nov 28 18:37:26 2017 CPU2006 License: 3 Test date: Nov-2017 Test sponsor: HPE Hardware availability: Oct-2017 Tested by: HPE Software availability: Apr-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 48 587 798 * 400.perlbench 48 584 802 S 400.perlbench 48 587 798 S 401.bzip2 48 966 479 S 401.bzip2 48 966 479 * 401.bzip2 48 971 477 S 403.gcc 48 470 822 S 403.gcc 48 471 820 S 403.gcc 48 470 821 * 429.mcf 48 279 1570 * 429.mcf 48 279 1570 S 429.mcf 48 278 1570 S 445.gobmk 48 814 618 S 445.gobmk 48 818 615 S 445.gobmk 48 816 617 * 456.hmmer 48 282 1590 S 456.hmmer 48 281 1590 * 456.hmmer 48 281 1590 S 458.sjeng 48 877 662 S 458.sjeng 48 878 662 * 458.sjeng 48 879 661 S 462.libquantum 48 55.5 17900 S 462.libquantum 48 55.6 17900 S 462.libquantum 48 55.6 17900 * 464.h264ref 48 946 1120 S 464.h264ref 48 950 1120 * 464.h264ref 48 962 1100 S 471.omnetpp 48 512 585 S 471.omnetpp 48 511 587 S 471.omnetpp 48 512 586 * 473.astar 48 525 642 S 473.astar 48 526 641 * 473.astar 48 527 639 S 483.xalancbmk 48 243 1360 S 483.xalancbmk 48 242 1370 S 483.xalancbmk 48 242 1370 * ============================================================================== 400.perlbench 48 587 798 * 401.bzip2 48 966 479 * 403.gcc 48 470 821 * 429.mcf 48 279 1570 * 445.gobmk 48 816 617 * 456.hmmer 48 281 1590 * 458.sjeng 48 878 662 * 462.libquantum 48 55.6 17900 * 464.h264ref 48 950 1120 * 471.omnetpp 48 512 586 * 473.astar 48 526 641 * 483.xalancbmk 48 242 1370 * SPECint(R)_rate_base2006 1100 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon Gold 5118 CPU Characteristics: Intel Turbo Boost Technology up to 3.20 GHz CPU MHz: 2300 FPU: Integrated CPU(s) enabled: 24 cores, 2 chips, 12 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chip(s) Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 16.5 MB I+D on chip per chip Other Cache: None Memory: 192 GB (12 x 16 GB 2Rx8 PC4-2666V-R, running at 2400) Disk Subsystem: 1 x 480 GB SATA SSD, RAID 0 Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) SP2 Kernel 4.4.21-69-default Compiler: C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux; Fortran: Version 17.0.3.191 of Intel Fortran Compiler for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32/64-bit Peak Pointers: Not Applicable Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run runspec command invoked through numactl i.e.: numactl --interleave=all runspec irqbalance disabled with "systemctl stop irqbalance" tuned profile set with "tuned-adm profile throughput-performance" Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling Memory Patrol Scrubbing set to Disabled LLC Prefetch set to Enabled LLC Dead Line Allocation set to Disabled Workload Profile set to General Throughput Compute Minimum Processor Idle Power Core C-State set to C1E State Sysinfo program /home/cpu2006/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on linux-h3xn Tue Nov 28 17:37:28 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 5118 CPU @ 2.30GHz 2 "physical id"s (chips) 48 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 12 siblings : 24 physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 13 physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 13 cache size : 16896 KB From /proc/meminfo MemTotal: 197745116 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d SUSE Linux Enterprise Server 12 SP2 From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-h3xn 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Nov 28 17:34 SPEC is set to: /home/cpu2006 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb4 xfs 405G 73G 332G 19% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE I41 09/29/2017 Memory: 4x UNKNOWN NOT AVAILABLE 12x UNKNOWN NOT AVAILABLE 16 GB 2 rank 2666 MHz, configured at 2400 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006/lib/ia32:/home/cpu2006/lib/intel64:/home/cpu2006/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 No: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. No: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. No: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revG.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revG.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Mar 22 14:07:20 2018 by CPU2006 ASCII formatter v6932. Originally published on 22 March 2018.